2026 IEEE 32nd International Symposium on On-Line Testing and Robust System Design (IOLTS)(2026)
School of Electrical and Computer Engineering
被引用0|浏览0
摘要
Binary Hyperdimensional Computing primitives offer significant energy and hardware benefits for power-constrained edge and portable AI applications, but are vulnerable to timing and soft errors in the associative memory storing high-dimensional representations, particularly under voltage overscaling, which causes significant accuracy loss. In this work, class hypervectors are represented in matrix form, with columns ordered by criticality with respect to classification accuracy and the critical columns clustered into submatrices via cosine similarity. Since traditional algorithmic checksums suffer from aliasing in binary representations, we use permutation-based checks on submatrix columns for error detection. For correction, we introduce a majority-vote column reconstruction (MVCR) algorithm: erroneous critical columns are replaced by a bit-wise majority vote across their submatrix, while erroneous non-critical columns are suppressed to zero. Validated on SRAM-based platforms under voltage scaling, the approach achieves up to 4× improvement in error resilience over state-of-the-art methods with minimal overhead.1