Enhancing SLP Vectorization Through Hybrid Slice Selection.

Superword-Level Parallelism (SLP) vectorization is a widely used compiler technique that transforms straight-line scalar code into efficient vector code by identifying and grouping independent, isomorphic instructions. Traditional SLP implementations typically initiate from store instructions and traverse upward along the defuse chain, making a single, local vectorization decision without being aware of the global knowledge. However, this heuristic strategy can be suboptimal due to the vectorization order, which can hinder performance and vectorization opportunities. In this work, we present a hybrid slice seleciton algorithm that strategically combines dynamic programming with greedy heuristics. This approach enables more informed decisions by analyzing vectorization order and inter-tree dependences, leading to improved utilization of SIMD resources and better overall performance. Our experiments demonstrate significant cost reductions across several standard benchmark suites for both RISC-V and ARMv8 architectures. According to the LLVM cost model, the optimizations yield an additional reduction of up to 67% on RISC-V and 41% on ARMv8.