PROCEEDINGS OF THE 2014 ARGENTINE SCHOOL OF MICRO-NANOELECTRONICS, TECHNOLOGY AND APPLICATIONS (EAMTA)(2014)
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摘要
Non-Binary Low-Density Parity-Check (NB-LDPC) codes have been shown to outperform equivalent LDPC codes defined over the binary field, especially when they are designed in high order Galois fields GF(q). This however leads to an increased decoding complexity. In this paper, a computationally efficient version of a soft distance algorithm used for decoding (NB-LDPC) error-correcting codes is described. This decoding algorithm uses squared Euclidean distance as the metrics, does not require knowledge of the signal-to-noise ratio of the received signal, and is less complex to implement than the Fast Fourier Transform Sum-Product and the log-sum-product algorithms. It is a simplified algorithm that can be easily implemented on programmable logic technology such as Field Programmable Gate Array (FPGA) devices because of its use of only additions, subtractions and look-up tables, avoiding the use of quotients and products. Simulations results show that the performance is the same as or better than that of the Fast Fourier Transform Sum-Product and the log-sum-product algorithms. Simulations were done over the AWGN, Rayleigh Fading and impulsive noise with a Symmetric Alpha-Stable (SαS) distribution channels.