Hardware Trojans pose a significant security risk in space-ground integrated network (SGIN) devices. It is widely accepted in academia and industry that detecting hardware Trojans at an early stage, typically in register transfer-level (RTL) hardware design, can effectively protect the SGIN device. However, the few hardware Trojan samples dedicated to SGIN (called sHT) make it difficult to detect them using deep learning. To obtain more sHT samples automatically and quickly, this article proposes a lightweight automatic sample augmentation framework for hardware Trojan (HT-ASAF). In our scheme, we first designed a lightweight neural network called variational autoencoder for hardware Trojan (HT-VAE) to achieve high-generation quality without a large amount of training data. Further, we develop the positional state tree (PST) and introduce a node tuple representation for interconversion between PST and sequence to capture the intricate semantic features of concurrent operations in hardware design to enhance the performance of HT-VAE. To automatically verify the effectiveness of the augmented samples, we established an experimental platform incorporating cluster mapping (CLM), which can reduce the verification complexity. In our experiments, to obtain a small number of the training hardware Trojan samples for SGIN, we added activation mechanisms, such as velocity or altitude, to the existing RTL hardware Trojans samples to simulate the hardware Trojan threats faced by orbit devices. The set of the obtained samples is called sHT dataset. Experimental results on the obtained sHT dataset demonstrate that HT-ASAF can automatically and efficiently augment hardware trojan sample compared to existing augmentation schemes, and it performs well in the downstream task of hardware Trojan detection on SGIN devices.
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