2021 ACM/IEEE WORKSHOP ON COMPUTER ARCHITECTURE EDUCATION (WCAE)(2021)
Univ Calif Berkeley
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摘要
Introductory-level computer architecture courses often rely on programs with a graphical user interface (such as Logisim) for processor design projects. While these tools provide an easy introduction into logic design, they can detach students from real-world design constraints such as ISA standard tests, and real-world ramifications such as timing and area. This paper introduces a testing flow based on open-source tools that allows Logisim-based designs to be built into ISA-test-compatible simulation binaries, synthesized into gate netlists, and compared for similarity. This flow was used in UC Berkeley’s fall 2020 Great Ideas of Computer Architecture course; out of 695 project submissions, over 96% achieved highly-functional designs as measured by the presented infrastructure. CCS CONCEPTS •Social and professional topics $\rightarrow$ Computer engineering education; •Computer systems organization $\rightarrow$ Reduced instruction set computing; Pipeline computing. ACM Reference Format: Ryan Lund, Connor McMahon, Dan Garcia, and Borivoje Nikolić. 2021. Improved Processor Design Project Testing. In Proceedings of WCAE ’21. ACM, New York, NY, USA, 7 pages. https://doi.org/10.1145/1122445.1122456