Improving Connectivity in Multiprocessor Architectures Using Rectangular Twisted Torus Networks.

Torus networks connect processing elements in network-on-chips for several high-performance computing applications. Though square torus networks are the most popular, Rectangular Torus (RT) networks are also used where the number of multiprocessors is constrained. A twist in the rectangular torus topology can be used to reduce the average inter-node distance of the network at the expense of network symmetricity. The Average Inter-node (Shortest) Distance property of a Rectangular Twisted Torus (RTT) Network is an important parameter to decide the twist to be applied to the RT network. Also, the regular mapping of an RTT network on a VLSI chip can take up multiple layers during implementation, which further limits the use of RTT in an application. The Average Inter-node Distance (AID), as a function of the twist, is examined and presented for a family of Rectangular Twisted Torus (RTT) networks. The two-dimensional mapping, using only two routing layers on a VLSI chip, of a subset of these RTT networks is also presented. The AID, as a function of the twist, can be used to select the RTT network to be used for an NoC application. The two-layer mapping of that RTT can be further used for implementation on an ASIC or FPGA.