In-Memory Encryption Using XOR-based Feistel Cipher in SRAM Array

Data security has become increasingly vital in modern computing systems, with the rise of sophisticated cyber threats and the widespread use of digital information. In-Memory Computing (IMC) has emerged as a promising approach to address data transfer bottlenecks and enhance computational efficiency. This work for the first time proposed an innovative method for in-memory data encryption utilizing the XOR-based Feistel cipher within a Static Random-Access Memory (SRAM) array. The XOR-based Feistel cipher offers simplicity and efficiency, making it an ideal candidate for in-memory encryption. We achieve data encryption without requiring the readout of the device state, leading to significant energy and delay savings over traditional computing-in-memory architectures. The effectiveness of the proposed method is demonstrated through extensive simulations and analysis, showcasing its robustness and efficiency in ensuring data security. Simulations results in 165 ps delay with a power consumption of 154 zW resulting in a PDP of 25.41 fJ. The proposed FC implementation features a 96.14% reduction in delay compared with the conventional FC computation.