Latch Divergency in Microprocessor Failure Analysis.

This paper presents an approach for analysis of system state differences observable through the scan chain for the debug of functional failures. A novel methodology for Latch Divergence Analysis (LDA) is proposed for creating stable failure signatures and reducing system noise. The methodology and processing flow have been integrated into the normal debug flow for the UltraSPARCTM family processors and have been successfully applied in numerous debugs in the bring-up of new products.