—Given the exponential growth of the semiconductor industry, it is critical to assess the life-cycle energy demand of its products for appropriate eco-design in nanoelectronics. For computational logic applications, life-cycle energy demand is highly application dependent. In this paper, we study the life cycle of CMOS logic chips for five computational logic applications: from high-performance 32 nm CPUs for servers and laptops to low-power 45 nm processors for set-top boxes and smart phones to ultra-low-power 130 nm MCUs for RFID tags and sensors. For each chip, we model the energy demand for the CMOS processing step of integrated circuit manufacturing as well as for their use phase including both active and stand-by modes. While use-phase energy in active mode is almost two orders of magnitude higher than CMOS processing energy for high-performance CPUs, the energy demand for ultra-low-power MCUs is completely dominated by CMOS processing energy.