Low-Power High Precision Floating-Point Divider with Bidimensional Linear Approximation

In this paper we propose a novel approximatefloating-point divider based on bidimensional linear approx-imation. In our approach, the mantissa quotient is seen asa function of the two input mantissas of the divider. Thedomain of this two-variable function is partitioned intonxxn ysubregions, named tiles, wherenx,n yare chosen as powers oftwo. In each tile the quotient is approximated with a linearcombination of the input mantissas. To achieve fine accuracy,an optimization problem is formulated within each tile todetermine the optimal coefficients for the linear combination,which minimize the Mean Relative Error Distance (MRED) of thedivider. Furthermore, to make hardware implementation moreeffective, the minimization problem is appropriately modified tosearch for optimal quantized coefficients. The hardware structureof the divider only requires a small look-up table to storethe linear approximation coefficients, and a carry save addertree. The proposed architecture is highly tunable at design-timeover a wide range of accuracy, depending on the number oftiles chosen for the approximation. The obtained results demon-strate error performance and hardware features superior to thestate-of-the-art. The proposed dividers define the Pareto front,considering the trade-off between power-delay-product vs.MREDand area-delay-product vs.MRED, forMREDin the range of4x10(-3)-2x10(-2). Application results for JPEG compressionand tone mapping further highlight the strength of our proposal,which exhibits Structural Similarity Index (SSIM) very close to1 in all cases and Peak Signal-to-Noise Ratio (PSNR) up to 45 dB.