Mapping Applications to an FPFA Tile [field Programmable Function Array]

Rosien, M.A.J.,Yuanqing Guo,Smit, G.J.M.,Thijs Krol

crossref（2003）

Dept. of Comput. Sci.

被引用5|浏览0

摘要

This paper introduces a transformational design method which can be used to map code written in a high level source language, like C, to a coarse grain reconfigurable architecture. The source code is first translated into a control data flow graph (CDFG), which is minimized using a set of behaviour preserving transformations, such as dependency analysis, common subexpression elimination, etc. After applying graph clustering, scheduling and allocation transformations on this minimized graph, it can be mapped onto the target architecture.

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关键词

C language,data flow graphs,logic design,programmable logic arrays,reconfigurable architectures,system-on-chip,C language,CDFG,FPFA applications mapping,FPFA tile,SOC,allocation transformations,behaviour preserving transformations,coarse grain reconfigurable architecture,common subexpression elimination,control data flow graph,dependency analysis,field programmable function array,graph clustering,graph minimization,high level source language,reconfigurable architecture,scheduling,source code mapping,system-on-a-chip,transformational design method