While Google's Sycamore processor [1] recently ushered in the era of Noisy Intermediate-Scale Quantum (NISQ) technologies, the longer-term perspective of universal gate-based fault-tolerant quantum computing will require millions of physical qubits. Integrating a very large number of nominally identical objects, and in this case cooling them all down to cryogenic temperatures will be a major engineering challenge. Their small scale, compatibility with technologies matured over several decades by the IC manufacturing industry, as well as potential for co-integration with their classical control and readout electronics make Si spin qubits an attractive option for scaling up.
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CMOS Scaling,Fault-tolerant Quantum Computation,Quantum Simulation,Quantum Computation,Quantum Information