Read and Write Analysis for Balanced Pattern Memristor Crossbar Array

In this paper, we try to access all possible memory combinations in a memristor crossbar array, reduce the effect of sneak path currents and also make read faster and simpler. For this, we analyze a balanced pattern architecture using a memristive crossbar array and also propose an effective read technique. We aim at reducing the problem of variability in the sneak path currents. Also from the read technique proposed, we reduce the measurements to read memory from the array.