Scalable Assembler System: Optimizing Performance Through Unified Data Structures and Procedure

System software architectures, such as assemblers, require synchronous maintenance as Instruction Set Architectures (ISAs) continuously evolve. These software systems typically feature dedicated, specialized implementations for each ISA. However, the fragmentation of data structures and implementation styles across distinct ISAs complicate performance optimization, rendering these optimizations non-portable, and introduce systemic challenges for rigorous performance analysis. Analogous issues also plague software like compiler backends.To address this challenge, we propose the Scalable Assembler System (SAS). SAS enables the reuse of ISA-agnostic modules by unifying its core data structures and procedural definitions. The SAS architecture, through the standardization of key data structures like instruction descriptors and unified workflow, decouples the core stages of the assembly process from ISAspecific designs. This separation allows performance analysis and optimization methodologies to be systematically applied across the entire assembly architecture.We have implemented a prototype system in the Rust language supporting AMD64, AArch64, and RISC-V64. Performance analysis to this prototype initially indicates that it exhibits a statistically significant performance advantage over GNU AS. Our quantitative analysis shows that integrating SAS into the compilation pipeline can yield approximately $1 \%$ performance improvement. We believe that the design experience of SAS and its unified methodology for performance analysis hold promise for further generalization to the architecture and optimization of other system software.