2024 IEEE International Conference on Contemporary Computing and Communications (InC4)(2024)
Electronics and Instrumentation Group Indira Gandhi Centre for Atomic Research Kalpakkam
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摘要
With the advent of new processing technologies, electronics have become more susceptible to interference, making fault detection an essential component of devices to ensure their functional integrity. Ensuring functional integrity is a critical requirement for safety in applications like nuclear instrumentation, automotive electronics, aerospace systems, industrial automation, and medical devices. One of the prominent fault detection mechanisms used in processor-based devices is the dual lockstep structure. In this paper, we present the design and implementation of a dual lockstep processor based on the open source SHAKTI C-Class processor. The design is simulated and implemented on a Field Programmable Gate Array (FPGA), and the results demonstrate its effectiveness in fault detection, ensuring functional safety. The synthesized results are compared with those of the base processor for area and performance.