Simulation-Based Reliability Improvement Factor for Safety-Critical Embedded Systems

In the design of safety-critical embedded systems (SCES), the use of reliability measures is crucial to identify reliability-optimized and cost-optimized fault-tolerant mechanisms (FTM). The reliability improvement factor (RIF) was used in this study, which is a ratio of the probability of failure of the baseline system to that of the redundant system for a fixed mission time. We extend the analytical RIF into the simulation-based RIF (SRIF), as a relative measure of the reliability improvement for the FTM of SCES. We calculated the SRIF of the FTM by substituting the failure rate, which can be obtained from the statistical fault injection simulation by using co-simulation models and representative fault models. We use SRIF to compare the performance of FTMs and find the most reliable FTM. As a case study, we compare the SRIF of the dual-modular redundant (DMR) FTM with the triple-modular redundant (TMR) using ARM7 SystemC simulation models.