Vectorization, Threading, and Cache‐blocking Considerations for Hydrocodes on Emerging Architectures

The computational efficiency of existing hydrocodes is expected to suffer as computer architectures advance beyond the traditional parallel central processing unit (CPU) model . Concerning new computer architectures, sources of relative performance degradation might include reduced memory bandwidth per core, increased resource contention due to concurrency, increased single instruction, multiple data (SIMD) length, and increasingly complex memory hierarchies. Concerning existing codes, any performance degradation will be influenced by a lack of attention to performance in their design and implementation.This work reports on considerations for improving computational performance in preparation for current and expected changes to computer architecture. The algorithms studied will include increasingly complex prototypes for radiation hydrodynamics codes, such as gradient routines and diffusion matrix assembly (e.g., in [1-6]). The meshes considered for the algorithms are structured or unstructured meshes. The considerations applied for performance improvements are meant to be general in terms of architecture (not specifically graphical processing unit (GPUs) or multi-core machines, for example) and include techniques for vectorization, threading, tiling, and cache blocking. Out of a survey of optimization techniques on applications such as diffusion and hydrodynamics, we make general recommendations with a view toward making these techniques conceptually accessible to the applications code developer. Published 2015. This article is a U.S. Government work and is in the public domain in the USA.