Web-enabled Neuron Model Hardware Implementation and Testing

This paper presents a prototype web-based Graphical User Interface (GUI) platform for integrating and testing a system that can perform Low-Entropy Model Specification (LEMS) neural network description to Hardware Description Language (VHDL) conversion, and automatic synthesis and neuron implementation and testing on Field Programmable Gate Array (FPGA) testbed hardware. This system enables hardware implementation of neuron components and their connection in a small neural network testbed. This system incorporates functionality for automatic LEMS to synthesisable VHDL translation, automatic VHDL integration with FPGA logic to enable data I/O, automatic FPGA bitfile generation using Xilinx PlanAhead, automated multiFPGA testbed configuration, neural network parameter configuration and flexible testing of FPGA based neuron models. The prototype UI supports clock step control and real-time monitoring of internal signals. References are provided to video demonstrations.