Amorphous InGaZnO thin-film transistors (a-IGZO TFTs) are being explored as a low-cost path to complementary metal oxide semiconductor (CMOS)-class logic on transparent and flexible substrates for internet of things applications. This direction requires aggressive footprint reduction, bringing channel width (W) scaling to the foreground. Here, we investigate width-dependent behavior in self-aligned top-gate a-IGZO TFTs and observe a clear trend in subthreshold swing (SS) with W. As W increases from 19 to 103 mu m at a fixed channel length (L = 4.5 mu m), SS improves (decreases) from similar to 123 to similar to 103 mV/dec under ambient transfer measurements. To explain this, we adopt a simple two-path conduction model that separates side-edge transport from center-bulk transport in the IGZO channel. For narrow channels, the high perimeter-to-area ratio makes edge paths-more sensitive to sidewall damage and interface traps-dominant, yielding larger SS. As W grows, current shifts toward the center-bulk region with better interface quality, reducing SS. Fitting the measured minimum SS-W relationship yielded SSbulk = 87 mV/dec, SSedge = 140 mV/dec, and W-c = 75 mu m, quantitatively supporting that edge-dominated subthreshold conduction penalizes narrower channels. These results indicate that edge-related interface quality is a primary factor behind the observed width dependence and provide practical guidance for high-pixel-density display backplanes and emerging IGZO-based CMOS logic.