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    专

    一种富臭氧胶质微纳气泡原位氧化分解藻华水体中藻毒素的方法

    17720220211357A
    发明人
    ZHANG MING, WANG YAFENG, ZHANG DAOYONG, PAN XIANGLIANG
    受让人
    UNIV ZHEJIANG TECHNOLOGY
    申请人
    KARL STORZ SE & Co. KG
    申请号
    2928006
    申请日
    2005-02-05
    公开(公告)号
    17720220211357A
    公开(公告)日
    1992-12-02
    IPC分类号
    G11C016/04G11C005/00
    CPC分类号
    -
    优先权号
    001700
    067681
    优先权日
    1983-04-18
    1983-04-18
    摘要

    NOVELTY - The non-volatile semiconductor storage device has a gate insulating film (420) that is formed on a semiconductor substrate (410). A gate electrode (535) is formed on the gate insulating film. The first and second spaced apart doped regions (440,445) are formed below the gate insulating film and the gate electrode in the semiconductor substrate. A grounded region of the first and second spaced apart doped regions is grounded via a contact. The gate insulating film is formed of oxide film, nitride film, oxynitride film, metal oxide film, or laminated film.

    USE - Non-volatile semiconductor storage device.

    ADVANTAGE - The thickness of the gate insulating film of the anti-fuse transistor 150 is formed to be smaller than that of the gate insulating film of the selection transistor to facilitate breakdown of the gate insulating film of the anti-fuse transistor even while applying a relatively low voltage. The voltage is dropped across a path between the gate and the source or between the gate and the drain of the anti-fuse transistor, in addition to between the gate and the bulk region of the anti-fuse transistor at a time of programming the OTP cell. The blowing resistance is accordingly decreased so that programming reliability of the OTP cell is able to be enhanced. The programming success rate is able to be increased because a resistive path is additionally formed between the gate and the source of the anti-fuse transistor or between the gate and the drain of the anti-fuse transistor. Thus programming reliability is able to be enhanced. A voltage higher than the program voltage is applied to each OTP cell during operation in order to ensure reliability of programming.

    DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a one time programmable (OTP) cell.

    DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view of an OTP cell.

    Semiconductor substrate (410)

    Gate insulating film (420)

    Doped region (440,445)

    Shallow trench isolation (475)

    Gate electrode (535)

    权利要求
    1. An acoustic processing system for audio signal processing comprising: a first apparatus including: a first memory that stores a first parameter for the audio signal processing, and a user interface that receives an operation for changing the first parameter; a second apparatus including: a second memory that stores a second parameter synchronized with the first parameter, a first CPU that performs system control, a second CPU that performs the audio signal processing, wherein the first CPU sends, to the second CPU, control information for controlling the audio signal processing based on the second parameter using a TCP/IP protocol, and wherein the second CPU receives the control information using the TCP/IP protocol, and performs the audio signal processing based on the control information, wherein the first CPU and the second CPU are one of: virtually different CPUs of a single physical CPU, different cores of the single physical CPU that includes a plurality of cores, or physically different CPUs within the second apparatus.
    2. The acoustic processing system according to claim 1 , wherein: the first apparatus includes a third memory that stores a third parameter different from the first parameter; and the acoustic processing system further includes another apparatus including a fourth memory synchronized with the third memory and a third CPU that performs the system control.
    3. The acoustic processing system according to claim 1 , further comprising: another apparatus including another CPU that performs the audio signal processing, wherein the first CPU sends the control information to the another CPU, and wherein the another CPU receives the control information, and performs the audio signal processing based on the received control information.
    4. The acoustic processing system according to claim 3 , wherein the first CPU sends the control information to the another CPU using a TMDS protocol.
    5. The acoustic processing system according to claim 1 , wherein the first memory and the second memory further store setting information for performing the system control.
    6. An acoustic processing method of audio signal processing using a first apparatus including a first memory and a user interface, and a second apparatus including a second memory, a first CPU, and a second CPU, the acoustic processing method comprising: storing, in the first memory, a first parameter for audio signal processing; receiving, via the user interface, an operation for changing the first parameter; storing, in the second memory, a second parameter synchronized with the first parameter; performing system control with the first CPU; performing the audio signal processing with the second CPU; the first CPU sending to the second CPU, control information for controlling the audio signal processing based on the second parameter using a TCP/IP protocol; the second CPU receiving the control information using the TCP/IP protocol; and the second CPU performing the audio signal processing based on the received control information, wherein the first CPU and the second CPU are one of: virtually different CPUs of a single physical CPU, different cores of the single physical CPU that includes a plurality of cores, or physically different CPUs within the second apparatus.
    7. The acoustic processing method according to claim 6 , wherein: the first apparatus further includes a third memory, the acoustic processing method further uses another apparatus including a third CPU and a fourth memory synchronized with the third memory, and the method further comprises: storing, in the third memory, a third parameter different from the first parameter; and the third CPU performing system control.
    8. The acoustic processing method according to claim 6 , wherein: the acoustic processing method further uses another apparatus including another CPU, and the method further comprises: the fourth CPU performing the audio signal processing; the first CPU sending the control information to the another CPU; the another CPU receiving the sent control information; and the another CPU performing the audio signal processing based on the received control information.
    9. The acoustic processing method according to claim 8 , wherein the first CPU sends the control information to the another CPU using a TMDS protocol.
    10. The acoustic processing method according to claim 6 , wherein the first memory and the second memory further store setting information for performing the system control.
    11. An audio signal processing apparatus for audio signal processing and communicable with an information processing apparatus including a first memory storing a first parameter for audio processing, and a user interface that receives an operation for changing the first parameter, the audio signal processing apparatus comprising: a second memory that stores a second parameter synchronized with the first parameter; and a first CPU that performs system control; a second CPU that performs the audio signal processing, wherein the first CPU sends, to the second CPU, control information for controlling the audio signal processing based on the second parameter using a TCP/IP protocol, and wherein the second CPU receives the control information using the TCP/IP protocol, and performs the audio signal processing based on the control information, wherein the first CPU and the second CPU are one of: virtually different CPUs of a single physical CPU, different cores of the single physical CPU that includes a plurality of cores, or physically different CPUs within the second apparatus.
    说明书
    [0001]技术领域
    [0002]本发明涉及热电偶技术领域,具体地说是一种超薄柔性热电偶及其制备方法。
    [0003]背景技术
    [0004]目前的温度检测设备正逐渐向小型化、轻薄化、可塑化方面发展,对柔性、小间隙空间的温度检测元器件需求也逐渐加大。例如传统的表面测温装置无法完全贴合在电池表面进行测温,制约了相关领域的发展。而采用柔性表面测温装置可突破传统点测温和平面测温的限制,可以广泛用于柔性、小间隙表面的精确测温设备。
    [0005]柔性表面测温装置作为柔性电子材料的温度监测基础,是柔性电子技术发展的基础与保证。而柔性表面测温装置中的薄膜热电偶主要用于刀头切割温度测量,薄而不柔,不能对柔性材料测温。并且目前柔性材料的工作温度在-30.0℃~85.0℃,而薄膜热电偶工作温度范围在0.0℃以上,无法完全满足柔性电子材料测温的需求。
    [0006]因此,设计一种超薄柔性热电偶及其制备方法,可以针对表面间隙小,测量面为非平面的表面,且需要接触式测温的柔性电子材料,并且可以测量零度以下的温度及瞬变温度。
    [0007]发明内容
    [0008]本发明为克服现有技术的不足,提供一种超薄柔性热电偶及其制备方法,可以针对表面间隙小,测量面为非平面的表面,且需要接触式测温的柔性电子材料,并且可以测量零度以下的温度及瞬变温度。
    [0009]为实现上述目的,设计一种超薄柔性热电偶及其制备方法,包括热电偶,其特征在于:所述的热电偶从下至上依次包括柔性衬底、铬膜、热电偶金属层、保护层,所述的热电偶金属层包括上下部分重叠的铜膜与康铜膜;
    [0010]其制备方法包括如下步骤:
    [0011]S1,在柔性衬底表面用气体等离子体或轰击柔性衬底表面;
    [0012]S2,采用磁控溅射系统在柔性衬底表面溅射铬膜;
    [0013]S3,采用磁控溅射系统在铬膜表面溅射铜膜,溅射时通过定时器逐步提高溅射功率,以5-10分钟作为间隔时间,以40W-60W作为功率间隔,从50W逐渐调高功率至250W;
    [0014]S4,采用磁控溅射系统在铬膜表面共溅射康铜膜,以高纯铜靶和高纯镍靶作为原子沉积源,分别控制两个靶材的电功率进行共溅射,使得铜原子及镍原子插层沉积在铬膜表面;
    [0015]S5,在氮气气压下,采用掺杂的磁控溅射系统在铜膜及康铜膜表面溅射保护层。
    [0016]所述的柔性衬底的材质选用聚酰亚胺、聚酯薄膜、超薄玻纤板中的一种或多种。
    [0017]所述的铜膜与康铜膜重叠部分的长度为3-10mm,宽度为0.5-3mm。
    [0018]所述的柔性衬底的厚度为0.1-0.5mm,铬膜的厚度为10-50nm,铜膜的厚度为600-1200nm,康铜膜的厚度为800-1200nm,保护层的厚度为10-50nm。
    [0019]所述的保护层的的材料为掺氮钛的铝膜。
    [0020]所述的步骤S1中气体等离子体选用惰性气体等离子体或氮气等离子体。
    [0021]所述的步骤S3中每个功率台阶的溅射时间是5-20min,溅射气压为0.2-1.0Pa。
    [0022]所述的步骤S4中共溅射气压为0.5-0.7Pa,铜靶的溅射功率为直流60-90W,镍靶的溅射功率为射频80-160W,共溅射时间为40-50min。
    [0023]所述的步骤S4中高纯铜靶和高纯镍靶与柔性衬底之间的距离为15-20cm。
    [0024]所述的步骤S4中高纯铜靶与高纯镍靶呈轴对称布置,高纯铜靶、高纯镍靶法线与柔性衬底法线的夹角为50-60°。
    [0025]本发明同现有技术相比,成本较低,可以针对表面间隙小,测量面为非平面的表面,且需要接触式测温的柔性电子材料,并且可以测量零度以下的温度及瞬变温度。
    [0026]附图说明
    [0027]图1为本发明热电偶的结构示意图。
    [0028]图2为本发明步骤S4的示意图。
    [0029]参见图1至图2,其中,1是柔性衬底,2是铬膜,3是铜膜,4是康铜膜,5是保护层,6是铜靶,7是镍靶,8是铜原子,9是镍原子。
    [0030]具体实施方式
    [0031]下面根据附图对本发明做进一步的说明。
    [0032]实施例1:
    [0033]如图1所示,本实施例的热电偶从下至上依次包括柔性衬底1、铬膜2、热电偶金属层、保护层5,所述的热电偶金属层包括上下重叠的铜膜3与康铜膜4,铜膜3与康铜膜4重叠部分的长度为5mm,宽度可自行裁剪为2mm。
    [0034]其中,柔性衬底1的材料选用聚酰亚胺。
    [0035]热电偶的制备方法具体包括如下步骤:
    [0036]S1,在柔性衬底1表面用气压为5Pa在200W射频电源作用下产生的氩气等离子体轰击柔性衬底1表面,等离子体气压为7-10Pa,轰击时间为15min,控制柔性衬底1的厚度为0.3mm。
    [0037]S2,采用磁控溅射系统在柔性衬底1表面溅射铬膜2,溅射功率为直流50W,溅射气压为0.5Pa,溅射时间为10min,控制铬膜2的厚度为30-50nm。
    [0038]S3,采用磁控溅射系统在铬膜2表面溅射铜膜3,溅射时通过定时器逐步提高溅射功率,先以50W的功率溅射5分钟,再90W溅射5分钟,再130W溅射5分钟,再170W溅射5分钟,再210W溅射5分钟,最后250W溅射10分钟,得到铜膜3。溅射气压为0.3Pa,控制得到的铜膜3的厚度为1000nm。
    [0039]S4,采用磁控溅射系统在铬膜2表面共溅射康铜膜4,以高纯铜靶6和高纯镍靶7作为原子沉积源,保证高纯铜靶6和高纯镍靶7与柔性衬底1之间的距离为15-20cm,高纯铜靶6、高纯镍靶7法线与柔性衬底1法线的夹角为50-60°,分别控制两个靶材的电功率进行共溅射,铜靶6的溅射功率为直流90W,镍靶7的溅射功率为射频160W,共溅射时间为40分钟min,共溅射气压为0.7Pa,使得铜原子8及镍原子9插层沉积在铬膜2表面,控制得到的康铜膜4的厚度为1100nm,康铜膜4中铜镍比例为55:45。
    [0040]S5,在1pa的氮气气压下,采用掺杂的磁控溅射系统在铜膜3及康铜膜4表面溅射保护层5,保护层5为掺氮钛铝膜,Ti与Al靶材的溅射功率分别为425W和150W,溅射气压为0.5Pa,溅射时间为20min,控制保护层5的厚度为300nm。
    [0041]在铜膜3表面溅射功率为425W,在康铜膜4表面溅射功率为150W,溅射气压为0.5Pa,溅射时间为20min,控制保护层5的厚度为300nm。
    [0042]步骤S1中,使用氩气等离子体轰击柔性衬底1表面,清洗柔性衬底1表面的同时去除柔性衬底1表面的自由基团。选用化学性质不活泼的惰性气体等离子体可以减少后期镀膜氧化的问题。
    [0043]本实施例的铬膜2作为柔性衬底与热电偶金属层的界面层,一方面高阻金属铬不会影响热电偶金属层的导电特性、热扩散性能。另一方面由于本发明的热电偶中的核心材料是铜原子,由于铬原子与铜原子原子结构上的差异,铬可以阻止铜的扩散,因此铬膜2可作为金属扩散阻挡层,可以防止热电偶金属层中的金属原子扩散,有利于提高热电偶的工作稳定性。
    [0044]步骤S3中,通过非连续改变的功率缓慢释放应力。铜原子的带电粒子沉积的过程中本身也会发热,逐步控制溅射功率,使温度缓慢变化,可以在不退火的情况下缓慢释放应力,无需通过加温、退火的方式实现消减应力的目的,简化了制备工艺。
    [0045]步骤S4中,如图2所示,同时对铜靶6和镍靶7施加不同的功率进行共溅射,通过电功率提供原子能量和加速度,不同的加速带电原子会在2个重叠的磁场作用下,按照一定的路径沉积到铬膜2上,最终得到铜、镍原子含量满足要求的康铜膜4。
    [0046]步骤S5中,掺氮的氧化铝薄膜可延长热电偶的表面氧化时间。
    [0047]本发明共溅射铜靶6和镍靶7,得到的康铜膜4的原子排列是可以通过调整功率、气压来调节的。如果选用单个铜镍合金靶溅射康铜膜,其得到的原子排列是随机,不可控的,这样得到的康铜膜与本实施例得到的康铜膜相比,由于膜层结构、原子排列、内阻均不同,得到的康铜膜的测温灵敏度是不同的,本发明得到的康铜膜的测温灵敏度为10-15μV·℃ -1 ,灵敏度较高。
    [0048]本实施例的铜膜3与康铜膜4部分重叠,形成热电动势。现有的热电偶中金属薄膜大面积重叠容易有断层,影响测试灵敏度,本发明通过步骤S3,逐步控制溅射功率,使温度缓慢变化,可以在不退火的情况下缓慢释放应力,没有应力,铜膜3的形变就小。功率逐步增大,原子密度变大,且沉积的元素颗粒度也越大,使得原子堆砌孔隙小,得到的铜膜3的致密度高,避免断层现象的产生。
    [0049]本实施例在柔性衬底1上制备了连续的超薄膜,可以任意裁剪、弯曲乃至卷曲,柔性较好,可以大面积制作,例如15*15cm,实际使用时,可直接根据需求裁剪成不同尺寸使用,例如1mm*5cm,可以进行点测试,也可以进行面或线测试。
    [0050]本实施例最后得到的热电偶的温度测量范围为-30.0~150.0±0.9℃,满足柔性电子材料测温的需求。
    [0051]本实施例最后得到的热电偶的灵敏度为9-15μV·℃ -1 ,可以测量柔性电子材料的瞬变温度。
    [0052]实施例2:
    [0053]如图1所示,本实施例的热电偶从下至上依次包括柔性衬底1、铬膜2、热电偶金属层、保护层5,所述的热电偶金属层包括上下重叠的铜膜3与康铜膜4,铜膜3与康铜膜4重叠部分的长度为8mm,宽度可自行裁剪为1.5mm。
    [0054]其中,柔性衬底1的材料选用聚酯薄膜。
    [0055]热电偶的制备方法具体包括如下步骤:
    [0056]S1,在柔性衬底1表面用气压为3Pa在150W射频电源作用下产生的氩气等离子体轰击柔性衬底1表面,等离子体气压为5-7Pa,轰击时间为30min,控制柔性衬底1的厚度为0.5mm。
    [0057]S2,采用磁控溅射系统在柔性衬底1表面溅射铬膜2,溅射功率为直流80W,溅射气压为0.8Pa,溅射时间为5min,控制铬膜2的厚度为50nm左右。
    [0058]S3,采用磁控溅射系统在铬膜2表面溅射铜膜3,溅射时通过定时器逐步提高溅射功率,先以50W的功率溅射5分钟,再90W溅射5分钟,再130W溅射5分钟,再170W溅射5分钟,再210W溅射5分钟,最后250W溅射10分钟,得到铜膜3。溅射气压为0.3Pa,控制得到的铜膜3的厚度为960nm。
    [0059]S4,采用磁控溅射系统在铬膜2表面共溅射康铜膜4,以高纯铜靶6和高纯镍靶7作为原子沉积源,保证高纯铜靶6和高纯镍靶7与柔性衬底1之间的距离为15-20cm,高纯铜靶6、高纯镍靶7法线与柔性衬底1法线的夹角为50-60°,分别控制两个靶材的电功率进行共溅射,铜靶6的溅射功率为:首先直流60W溅射5分钟,再直流80W溅射10分钟,最后直流90W溅射30分钟;镍靶7的溅射功率为:首先射频80W溅射5分钟,再射频100W溅射10分钟,最后射频160W溅射30分钟,共溅射时间为45分钟min,共溅射气压为0.5Pa,使得铜原子8及镍原子9插层沉积在铬膜2表面,控制得到的康铜膜4的厚度为1200nm,康铜膜4中铜镍比例为55:45。
    [0060]S5,在1pa的氮气气压下,采用掺杂的磁控溅射系统在铜膜3及康铜膜4表面溅射保护层5,保护层5为掺氮钛铝膜,Ti与Al靶材的溅射功率分别为425W和150W,溅射气压为0.5Pa,溅射时间为20min,控制保护层5的厚度为300nm。
    [0061]本实施例在柔性衬底1上制备了连续的超薄膜,可以任意裁剪、弯曲乃至卷曲,柔性较好。
    [0062]本实施例最后得到的热电偶的温度测量范围为-50.0~150.0±0.3℃,满足柔性电子材料测温的需求。
    [0063]本实施例最后得到的热电偶的灵敏度为10-15μV·℃ -1 ,可以测量柔性电子材料的瞬变温度。
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