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    麦长管蚜不同密度处理下稳定表达的内参基因RPL14的部分序列、克隆方法及应用

    14860141248B1
    发明人
    朱勋, 阎维巍, 高海峰, 李祥瑞, 张云慧, 程登发, 李新安, 任智萌, 龚培盼, 王超, 魏长平, 杨超霞, 李亚萍, 殷新田
    受让人
    INST PLANT PROT CAAS
    申请人
    Facebook Inc.
    申请号
    1020210003011
    申请日
    1996-03-18
    公开(公告)号
    14860141248B1
    公开(公告)日
    2015-10-26
    IPC分类号
    H01H73/02
    CPC分类号
    -
    优先权号
    202022671463
    优先权日
    2020-11-17
    摘要

    Swimming aid consists of means which link each foot to an arm so that part of the muscle power developed by the legs is transmitted to the arms. The hand held-paddles are similarly provided to increase the area with which contact is made with the water. Each foot should be linked to its associated arm through a cord, or a triangle of plastics film. The increased area is preferably provided by two identical components arranged symmetrically on the swimmers arms. When the plastics film triangles are used the hand held paddles may be dispensed with, the required surfaces for increasing the propelling power being provided by these triangles which have one apex at each of the swimmers feet and the other two at his hands and elbows. Suitable ring fasteners are provided for attaching the various devices to the swimmers limbs.

    权利要求
    1. A semiconductor memory device, comprising: a first divider circuit for dividing a clock pulse; a second divider circuit for dividing the clock pulse in response to an input of a control pulse; a refresh pulse generation circuit for generating a refresh pulse in response to an output from the first divider circuit and a cycle selection signal; a cycle selection circuit for generating the cycle selection signal for changing a cycle, at which the refresh pulse is generated, in response to an output from the second divider circuit; a refresh address generator for generating a refresh address signal in response to the refresh pulse; a decoder for activating a word line corresponding to the refresh address signal; and a memory cell array comprising a plurality of memory cells disposed in an array state and a plurality of bit lines and word lines connected to the memory cells, respectively.
    2. A semiconductor memory device according to claim 1 , wherein the first divider circuit generates a first divided pulse having a short cycle and a second divided pulse having a long cycle.
    3. A semiconductor memory device according to claim 1 , wherein the second divider circuit measures a time from several seconds to several tens of seconds by a plurality of flip-flops.
    4. A semiconductor memory device according to claim 1 , wherein the refresh pulse generation circuit controls a refresh pulse generation cycle in response to the cycle selection signal.
    5. A semiconductor memory device according to claim 1 , wherein the cycle selection circuit changes the cycle selection signal in response to an output front the second divider circuit.
    说明书
    [0001]FIG. 1 is a front elevational view of the combined electronic business card and stylus showing my new design; FIG. 2 is a rear elevational view of the electronic business card thereof; FIG. 3 is a left-side elevational view of the electronic business card thereof; FIG. 4 is right side view of the electronic business card thereof; FIG. 5 is a top plan view of the electronic business card thereof; and, FIG. 6 is a bottom plan view of the electronic business card thereof.
    同族专利
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