In recent years, the demand for deploying machine learning models on edge devices has surged, requiring the evolution and deployment of energy efficient and tiny neural network topologies. This paper presents a lightweight neural architecture search framework designed to identify convolutional neural networks specifically deployable in the very scarce assets of the Intelligent Sensor Processing Units (ISPUs), a single package integrating accelerometer and gyroscope sensing and low energy programmable processor. The framework runs both training and inference on a multiprocessor edge device, such that the models are lightweight and computationally efficient to operate within the 40 KiB embedded memory limit of the ISPUs. The framework utilizes a derivative-free search strategy, inspired by Occam’s razor to explore the architectural design space effectively, balancing model size, accuracy, and computational complexity. Models were generated for the PAMAP2 and SHL datasets to perform human activity recognition. For each dataset, a separate model was generated for every user and for each device carry position. Experimental results demonstrate that the proposed workflow successfully and automatically devises topologies that meet the stringent memory requirements of the ISPU. It also provides competitive performance in terms of accuracy and speed. This work contributes to the field of edge computing by enabling the embedded-on-premises operations, therefore enhancing the autonomy and privacy of personalized intelligent devices.

Recent advancements in large language models (LLMs) have enabled reasoning-like behavior and sophisticated AI agents, but their deployment usually depends on cloud infrastructure or high-performance hardware. Existing local implementations rarely target energy-efficient edge scenarios. This work presents a conversational AI thermostat assistant running fully on a Raspberry Pi 5, a low-cost and moderately constrained device. The system combines Moonshine for speech-to-text, Granite 3.3 (8B) for natural language reasoning, and Piper for speech synthesis, enabling cloud-free voice interaction. Experiments show low latency for speech modules, while LLM inference remains the main bottleneck. The results highlight both the feasibility and current limitations of agentic AI on constrained hardware, stressing the need for further research to achieve practical real-time edge deployment.

This manuscript proposes a new method to improve the MLCommons protocol for measuring power consumption on Microcontroller Units (MCUs) when running edge Artificial Intelligence (AI). In particular, the proposed approach (i) selectively measures the power consumption attributable to the inferences (namely, the predictions performed by Artificial Neural Networks - ANN), preventing the impact of other operations, (ii) accurately identifies the time window for acquiring the sample of the current thanks to the simultaneous measurement of power consumption and inference duration, and (iii) precisely synchronize the measurement windows and the inferences. The method is validated on three use cases: (i) Rockchip RV1106, a neural MCU that implements ANN via hardware neural processing unit through a dedicated accelerator, (ii) STM32 H7, and (iii) STM32 U5, high-performance and ultra-low-power general-purpose microcontroller, respectively. The proposed method returns higher power consumption for the two devices with respect to the MLCommons approach. This result is compatible with an improvement of selectivity and accuracy. Furthermore, the method reduces measurement uncertainty on the Rockchip RV1106 and STM32 boards by factors of 6 and 12, respectively.

In the context of energy transformation and a growing supply of renewable energy, additional flexibility of transmission lines is required. Dynamic Line Rating provides a solution to this question by allocating additional capacities in the power lines depending on the actual weather conditions. Modern implementations of Dynamic Line Rating are typically based on costly on-line sensors or unreliable weather stations mounted on pylons. This paper proposes a novel solution to the Dynamic Line Rating, by implementing a tiny machine learning approach suitable for integration into the sensor and a real-time decision algorithm for the detection of potential new allocation spots. The proposed forecasting methodology is based on a self-learning radial basis function model, that forecasts the temperature of the conductor 5-, 10-, and 15 minutes into the future. The model can be accommodated on a cheap microcontroller device and is suitable for on-device self-calibration at the desired retraining frequency (RF). The forecasting results are promising, achieving mean absolute errors below 0.3 degrees C in the best test scenarios, a clear improvement over a naive persistence benchmark, and competitive performance when compared with the enhanced proposed Echo State Network (ESN). Subsequently, an algorithmic non-parametric Change Detection Test is executed on top of the forecaster to determine the possible points of change for dynamic allocation of the Over Head Line capacity, qualitatively and quantitatively demonstrating the potential capacity expansion compared to traditional Static Line Rating.

Sensor drift, caused by environmental and operational stresses, is a significant issue that impacts several domains. In agriculture, it is particularly relevant during irrigation, fertilization, and climate monitoring, ultimately affecting crop yield and quality. This paper adopts a deep edge-centric approach, minimizing reliance on cloud and non-deep edge platforms to improve data privacy, reduce latency and power consumption, and support real-time decision-making. This strategy involves designing lightweight, resource-efficient algorithms that operate on energy -constrained and low -cost deep edge devices, such as the sensors which are essential components to serve metrology purposes. The work is focused on devising on-(ultra tiny)device learning techniques, enabling continuous adaptation to changing conditions while meeting strict power consumption requirements such as the sensor's one. A key contribution is the TinyRBF model, a deeply constrained dynamic Radial Basis Function network tailored for edge devices. TinyRBF addresses the limitations of existing on-device learning methods by balancing prediction accuracy with memory and computational efficiency. Experimental results collected in a challenging agricultural testbed demonstrate its low resource usage and robust performance, making it a scalable solution for real-world applications.

The deployment of neural networks on resource-constrained micro-controllers has gained momentum, driving many advancements in Tiny Neural Networks. This paper introduces a tiny feed-forward neural network, TinyFC, integrated into the Field-Oriented Control (FOC) of Permanent Magnet Synchronous Motors (PMSMs). Proportional-Integral (PI) controllers are widely used in FOC for their simplicity, although their limitations in handling nonlinear dynamics hinder precision. To address this issue, a lightweight 1,400 parameters TinyFC was devised to enhance the FOC performance while fitting into the computational and memory constraints of a micro-controller. Advanced optimization techniques, including pruning, hyperparameter tuning, and quantization to 8-bit integers, were applied to reduce the model's footprint while preserving the network effectiveness. Simulation results show the proposed approach significantly reduced overshoot by up to 87.5 overshoot elimination, highlighting the potential of tiny neural networks in real-time motor control applications.

Sensors for continuous glucose monitoring provide real-time data about blood glucose concentration values. The operational duration of these devices ranges between 10 to 15 days, during which they frequently exhibit known errors as documented within the user application notes. This study introduces a novel approach, employing a comprehensive synthetic dataset that simulates 500 responses of 10 CGM sensors, to facilitate their self-calibration and self-learning autonomously, bypassing the need for back-propagation. The proposed solution minimizes sensor errors utilizing a Tiny Radial Basis Function Neural Network (TinyRBF) as its foundation. A variety of calibration intervals, spanning from 1 hour to a full week, were employed to characterize the model. The TinyRBF model demonstrated a reduced demand for computational resources by employing an average of 1.02 neurons, which is less than that required by other compact models such as Legendre Memory Unit (LMU) and Temporal Convolutional Network (TCN) models. This approach yielded a Mean Absolute Error (MAE) of 12.1 mg/dL, with recalibration executed every three days. Ultimately, the TinyRBF model was implemented on an Intelligent Sensor Processing Unit (ISPU), incorporating a low-power instruction set directly within the sensor package. The model quantized to 16 bits exhibited a 33.5% decrease in inference time in contrast to its floating-point counterpart. These findings imply its suitability for implementation within the sensor’s embedded computational resources.

The shift of computing capabilities towards edge sensing elements in image classification tasks is leading to the substitution of cameras in some industrial and consumer tasks with ultra-low-resolution (ULR) Time-of-Flight (ToF) sensors, thanks to their compactness and ultra-low power consumption. To effectively integrate classification capabilities into edge devices, a hardware-aware design of the classification algorithm and a careful custom Hardware (HW) post-processing core are needed. This work proposes a new compact and ultra-low power Neural Network (NN) that enables the implementation of a HW post-processing core for real-time classification tasks inside the sensor packaging. The resulting HW architecture has been prototyped on an AMD Xilinx Artix-7 FPGA, reaching an Energy per Inference consumption of 65.6 nJ and a power consumption of 1.095 W at the maximum Output Data Rate of the sensor. Moreover, the implementation in Skywater 130 nm technology reveals an area occupation below 1 mm^2 , with a total power compared to the sensor consumption of about 11

This article presents a real-time Artificial Intelligence-based Reconfigurable Self-Calibration Unit (AI-ReSCU) for piezoresistive MEMS pressure sensors, designed to mitigate long-term drift effects induced by thermal stress. The system integrates a compact and reconfigurable neural network to dynamically estimate and correct sensor inaccuracies with minimal energy and area overhead. The architecture comprises a trigger module for detecting deviations from nominal behavior and a compensation engine driven by a quantized neural network optimized for hardware efficiency. The network processes temporal input windows and operates using 24-bit activations and 1-bit weights, enabling real-time inference with ultra-low power consumption. The fully digital system was prototyped in STMicroelectronics' BCD8 technology, occupying 0.55 mm2 and achieving a dynamic power consumption of 4.46 nW under typical conditions, thanks to extensive resource reuse and clock gating strategies. Offline experimental validation on LPS22HH pressure sensors demonstrated the system's ability to recover up to 1.6 hPa of drift-induced error with a recovery latency of approximately 50 input samples, while maintaining measurement deviations within +/- 0.5 hPa across multiple stress scenarios.

This work presents an extensive design space exploration toward the optimal design of a hardware (HW) accelerator for multiclass object classification, implementing a configurable convolutional neural network (CNN) to be closely coupled with ultralow spatial resolution (ULR) time-of-flight (ToF) sensors in an in-sensors computing approach. The study leverages ULR ToF as the sole sensing element to perform classification, exploiting only the low-resolution depth map of the scene. The investigation, based on the STMicroelectronics VL53L8CX 8 x 8 pixel ToF sensor, led to very high accuracy, together with unprecedented low power consumption, compactness, and real-time operation. Indeed, the CNN classifies four objects even in the presence of partial occlusion and overlap, achieving an accuracy higher than 92% when an 8-bit posttraining quantization is used. The derived architecture, implemented in skywater CMOS 130-nm technology, occupies less than 1 mm(2) of area, with a power consumption of about 11% of the overall power consumption of the sensor in ranging mode and consumes less than 80 nJ per inference with an inference time of 3.3 mu s.

Recent advancements in neural networks (NNs) have underscored their potential for deployment in domains that demand computationally intensive operations, including applications on resource-constrained edge devices. This study investigates the integration of a compact neural network, TinyFC, within the Field-Oriented Control (FOC) framework of a Permanent Magnet Synchronous Motor (PMSM). While proportional–integral (PI) controllers remain a widely adopted choice for FOC due to their simplicity, their performance can degrade significantly under high-frequency speed transitions, where nonlinear dynamics introduce notable inaccuracies. The TinyFC model complements the PI controller by learning the intrinsic dependencies within the control loops and generating corrective signals to alleviate these inaccuracies. To ensure practical implementation, TinyFC underwent extensive optimization procedures, incorporating advanced techniques such as hyperparameter tuning, pruning, and 8-bit quantization. These measures successfully reduced the model’s computational overhead while preserving predictive accuracy. Simulation results demonstrated that embedding TinyFC within the FOC framework substantially reduced overshoot, with the pruned TinyFC entirely eliminating overshoot when integrated into the speed control unit. These findings highlight the feasibility of employing lightweight neural networks for real-time motor control applications, establishing a foundation for more efficient and precise control strategies in edge automotive and industrial systems.

Detecting tiny shapes, per pixel, of mammals can be challenging in small environments, such as the cages used for pre-clinical studies. There are tens of racks containing hundreds of cages in a typical installation. In such a context, this paper examined several neural models, taking into account their computational and memory complexity, to ensure that they can be deployed on tiny off-the-shelf and cheap microcontrollers. The study employed a NUCLEO board with STM32U5 connected to a time of flight sensor named VL53L8CX. This sensor generated sequences of depth frames over time. These data were collected into a hand-crafted dataset, which, following a data augmentation process, achieved a totals of 2498 samples. The models considered were: a U-Net based architecture; a hand-crafted one, called Micronet. The latter, following the post-training quantization procedure to 8 bits integer, achieved a mAP score above 86%, an inference time of 0.27 ms, a FLASH size of 1.3 KiB and a RAM usage of 0.5 KiB. These results enabled the implementation of a high-speed detector on cheap microcontroller chip.

Large Language Models achieve state of art performances on a broad variety of Natural Language Processing tasks. In the pervasive IoT era, their deployment on edge devices is more compelling than ever. However, their gigantic model footprint has hindered on-device learning applications which enable AI models to continuously learn and adapt to changes over time. Back-propagation, in use by the majority of deep learning frameworks, is computationally intensive and requires storing intermediate activations into memory to cope with the model’s weights update. Recently, “Forward-only algorithms” have been proposed since they are biologically plausible alternatives. By applying more “forward” passes, this class of algorithms can achieve memory reductions with respect to more naive forward-only approaches and by removing the need to store intermediate activations. This comes at the expense of increased computational complexity. This paper considered three Large Language Model: DistilBERT, GPT-3 Small and AlexaTM. It investigated quantitatively any improvements about memory usage and computational complexity brought by known approaches named PEPITA and MEMPEPITA with respect to backpropagation. For low number of tokens in context, and depending on the model, PEPITA increases marginally or reduces substantially arithmetic operations. On the other hand, for large number of tokens in context, PEPITA reduces computational complexity by 30% to 50%. MEMPEPITA increases PEPITA’s complexity by one third. About memory, PEPITA and backpropagation, require a comparable amount of memory to store activations, while MEMPEPITA reduces it by 50% to 94% with the benefits being more evident for architectures with a long sequence of blocks. In various real case scenarios, MEMPEPITA’s memory reduction was essential for meeting the tight memory requirements of 128 MB equipped edge consumer devices, which are commonly available as smartphone and industrial application multi processors.

Electric mobility is pervasive and strongly affects everyone in everyday life. Motorbikes, bikes, cars, humanoid robots, etc., feature specific battery architectures composed of several lithium nickel oxide cells. Some of them are connected in series and others in parallel within custom architectures. They need to be controlled against over current, temperature, inner pressure and voltage, and their charge/discharge needs to be continuously monitored and balanced among the cells. Such a battery management system exhibits embarrassingly parallel computing, as hundreds of cells offer the opportunity for scalable and decentralized monitoring and control. In recent years, tiny machine learning has emerged as a data-driven black-box approach to address application problems at the edge by using very limited energy, computational and storage resources to achieve under mW power consumption. Examples of tiny devices at the edge include microcontrollers capable of 10–100 s MHz with 100 s KiB to few MB embedded memory. This study addressed battery management systems with a particular focus on state-of-charge prediction. Several machine learning workloads were studied by using IEEE open-source datasets to profile their accuracy. Moreover, their deployability on a range of microcontrollers was studied, and their memory footprints were reported in a very detailed manner. Finally, computational requirements were proposed with respect to the parallel nature of the battery system architecture, suggesting a per cell and per module tiny, decentralized artificial intelligence system architecture.

MEMS pressure sensors are widely used in various application fields such as industrial, consumer, medical, and automotive. However, cost-effective manufacturing techniques severely affect these sensors due to temperature, dust, humidity, and many other stresses which ultimately lead to drift in their measurements. Thermal stresses are the main cause of sensor drifts. Exposure to high levels of temperatures can cause output deviations in the sensor's response for hours (short term) and several days (long term). This paper studied a state of art MEMS pressure sensor under 3 simulated case studies representing real-world application scenarios. The first case study was dedicated to the drifts caused by the soldering process during assembly with five reflow cycles. The second one induced drift due to the exposure of the sensor to a thermal stress of 150 Celsius degrees for 1,000 hours. The last case represented an aging test for the sensor left at the ambient temperature of 25 Celsius degree. Pressure measurements were acquired by several real devices and compared to the pressure measured by a golden reference barometer. In each case study, data was categorized into 3 bins to achieve more accurate compensations. The pressure error datasets served to train an ultra-tiny convolutional neural network to predict the pressure error for the compensation. The network decreased the absolute pressure errors of the sensors by 84.13% in average after 5 soldering cycles. The model was composed of 101 parameters with a total FLASH memory size of 13 KiB, including all required application libraries. Computational complexity was 146 multiply-accumulate operations. It was deployed on a tiny off-the-shelf MCU (STM32U5, 160MHz) achieving an inference time of 50 mu s.

Quantization is a technique that maps the representation of 32-bit floating point numerical values to a reduced set of discrete values. It is a fundamental asset for tiny machine learning developments aiming to bring artificial intelligence capabilities to the edge. It eases embedded devices with limited assets, such as microcontrollers to infer intelligent workloads close to sensors, with minimal memory footprint and computational capabilities. MEMS piezo pressure sensors are widespread today in a wide variety of applications. Unfortunately, they are affected by a broad range of stress conditions that ultimately cause sensor measurements to drift. This work investigated how to compensate such a drift for a MEMS pressure sensor using ipo-parameterized (101 parameters) and quantized convolutional neural networks which can be easily integrated on a microcontroller or even into the same sensor package. The models were trained to predict the pressure errors introduced by three case studies applied to a state-of-the-art sensor subject of stress conditions and to compensate for the sensor measurements. The models were designed with the same topology in terms of the quantization layers and by using a mix of activation and weight quantizers such as binary and 24 -bit fixed-point formats. The neural networks were trained by adopting the quantization-aware scheme of the QKeras framework. Prominent memory savings were achieved by these models compared to the full precision 32-bit floating point ones while offering gains in the accuracy of the predictions.

Time-of-Flight (ToF) sensors are generally used in combination with red-blue-green sensors in image processing for adding the 3-D to 2-D scenes. Because of their low lateral resolution and contrast, they are scarcely used in object detection or classification. In this work, we demonstrate that ultra-low resolution (URL) ToF sensors with 8x8 pixels can be successfully used as stand-alone sensors for multiclass object detection even if combined with machine learning (ML) models, which can be implemented in a very compact and low-power custom circuit. Specifically, addressing an STMicroelectronics VL53L8CX 8x8 pixel ToF sensor, the designed ToF+ML system is capable to classify up to 10 classes with an overall mean accuracy of 90.21%. The resulting hardware architecture, prototyped on an AMD Xilinx Artix-7 field programmable gate array (FPGA), achieves an energy per inference consumption of 65.6 nJ and a power consumption of 1.095 mu W at the maximum output data rate of the sensor. These values are lower than the typical energy and power consumption of the sensor, enabling real-time postprocessing of depth images with significantly better performance than the state-of-the-art in the literature.

This paper presents the design of tiny deeply quantized neural networks suitable for super integration within the Time-of-Flight, low-resolution, image sensor. They were aimed to achieve ultra low complexity with adequate classification accuracy. First floating-point models were studied to process 8-bits images 2 × 2 pixel resolution, down-sampled from 8 × 8 images of a public dataset. Data were acquired with an off-the-shelf Time-of-Flight sensor. Next, many deeply quantized networks were designed from scratch by using QKeras quantization training-aware schema. 8 and 6 bits pixel depth were generated by the sensor. Ternary, 6, and 8 bits quantizers were used along with convolutions and dense layers. Experimental results have shown that the proposed deeply quantized models achieved in maximum an accuracy of 77.79

In the context of TinyML, many research efforts have been devoted to designing forward topologies to support On-Device Learning. Reaching this target would bring numerous advantages, including reductions in latency and computational complexity, stronger privacy, data safety and robustness to adversarial attacks, higher resilience against concept drift, etc. However, On-Device Learning on resource constrained devices poses severe limitations to computational power and memory. Therefore, deploying Neural Networks on tiny devices appears to be prohibitive, since their backpropagation-based training is too memory demanding for their embedded assets. Using Extreme Learning Machines based on Convolutional Neural Networks might be feasible and very convenient, especially for Feature Extraction tasks. However, it requires searching for a randomly initialized topology that achieves results as good as those achieved by the backpropagated model. This work proposes a novel approach for automatically composing an Extreme Convolutional Feature Extractor, based on Neural Architecture Search and Bayesian Optimization. It was applied to the CIFAR-10 and MNIST datasets for evaluation. Two search spaces have been defined, as well as a search strategy that has been tested with two surrogate models, Gaussian Process and Random Forest. A performance estimation strategy was defined, keeping the feature set computed by the MLCommons-Tiny benchmark ResNet as a reference model. In as few as 1200 search iterations, the proposed strategy was able to achieve a topology whose extracted features scored a mean square error equal to 0.64 compared to the reference set. Further improvements are required, with a target of at least one order of magnitude decrease in mean square error for improved classification accuracy. The code is made available via GitHub to allow for the reproducibility of the results reported in this paper.

Speech enhancement is a critical field in audio signal processing given its essentiality to overcome obstacles related to loud and damaged speech signals. Due to the revolutionary capa-bilities of Deep Learning (DL) models, there has been significant interest on benchmarking them and studying their suitability for tiny embedded systems. In this paper, we thoroughly examine the growing field of voice improvement, with a specific emphasis on the use of DL-based techniques under consideration by the MLCommons standardization. In particular, among the others, the Legendre Memory Unit (LMU) model achieves an average Scale-Invariant Signal-to-Distortion Ratio (SISDR) on 8.613 in 627 KiB of FLASH memory, making it deployable on tiny microcontrollers by requiring only 7 ms per inference run.