Time Of Flight PET (TOF-PET) is a transformative technology for PET systems, but reaping its fullest potential requires achieving very high spatial and timing resolution, and overcoming dependency on signal variability at the level of the individual pixels. In this study, we try to quantify the advantage of using custom waveform sampling devices versus TDC methodology using realistic estimates of noise and other non-idealities. With the use of DNN methodology we show achievable gain for current and future acquisition systems, and also demonstrate the feasibility of DOI estimation from single side readout. We conclude by arguing for the scalability of such a system based on our experience with compact waveform digitizer design.
This paper presents the design of the second revision of a waveform sampling ASIC (HDSoC), optimized for high density light detectors, such as Silicon Photomultiplier (SiPM) or MA-PMTs, suitable for large and high rate NP experiments such as the Relativistic Heavy Ion Collider and the future Electron Ion Collider. In this paper we cover the improvement of the design, fabrication and preliminary test results for the second revision of the chip.
In this report we describe a novel benchtop installation of the Compact Lidar Digitizing Receiver (CoLiDR) system, which is capable of measuring the time domain waveform induced by a laser impulse on all elements of a 64 element pixelated Silicon Photomultiplier array simultaneously; while meeting a size, weight, and power requirement that is suitable for space missions on cubesats or planetary/lunar mapping projects. We will report measurements of the novel digitizing ASIC HDSoCv2, using its internal current amplifier circuit, coupled to an Onsemi 8x8 SIPM array measuring a pulsed laser synchronized to the digitizer system.
The ALERT-TOF detector (AtoF), to be installed in CLAS12 at Jefferson Lab, aims at detecting low momentum recoiling ions through scintillator coupled SiPM-generated pulses with excellent time resolution. The experimental capability and systematics can be greatly enhanced by the availability of waveform data from the scintillation process, especially during the high luminosity experimental configuration. For this reason, we developed a novel readout board using Nalu Scientific custom digitizing asics (ASoCs) that is capable of acquiring waveform data at ~2.2Gsps or more from 48 independent channels. The board is currently under testing and it is expected to be incorporated in the experiment in the near future.
In this article we describe the design and testing of the HPSoCv2, the second prototype in a sequence of planned family of integrated circuits aiming at high resolution readout (10 ps or better resolution) of fast and dense sensor arrays (e.g. LGADs) - servicing up to 100 channels per chip. HPSoCv2 is the second generation prototype (4 channel) that includes an improved input TransImpedance Amplifier and initial back end digital control logic to perform autonomous triggering and readout for each of its inputs. In this paper, we present the design, fabrication and testing of the digitizer prototype.
In this article we describe a series of novel measurements and timing calibrations we performed on the Advanced ASoC Rapid Digitizer, Variable Readout Chip (AARDVARC), a waveform digitizer designed for the readout of signals with very high timing resolution. In the course of the analysis we will demonstrate how a proper timing calibration methodology can provide resolutions below 10ps.
We present the first results from the HPSoC ASIC designed for readout of Ultra-fast Silicon Detectors. The 4-channel ASIC manufactured in 65 nm CMOS by TSMC has been optimized for 50 μm thick AC-LGAD. The evaluation of the analog front end with β-particles impinging on 3 × 3 AC-LGAD arrays (500 μm pitch, 200 × 200 μm2 metal) confirms a fast output rise time of 600 ps and good timing performance with a jitter of 45 ps. Further calibration experiments and TCT laser studies indicate some gain limitations that are being investigated and are driving the design of the second-generation pre-amplification stages to reach a jitter of 15 ps.
We present preliminary results on the timing performance, data throughput and the trigger rate of HDSoC Version 1, a 32-channel digitizer, sampling at 1 Giga Samples per second (GSa/s). In this paper, we discuss the intra-channel timing between pulses and fast data acquisition using Gigabit Ethernet to improve the pulse acquisition rate.
In this report we describe a novel installation of the Time Resolved Beam Halo Monitor (TRBHM) system, integrating a diamond detector and high-speed waveform digitizer, at the Facility for Advanced Accelerator Experimental Tests (FACET) at the SLAC National Accelerator Laboratory. This work will result in the measurement and characterization of high-energy electron accelerator beam halo both spatially and temporally. This measurement is done by utilizing on-detector electrode lithography and the resulting impulsive current pulses are read out by system-on-chip (SoC) high density waveform digitizers developed by Nalu Scientific LLC (NSL). The theory, detection methodology, and instrumentation will be discussed, as well the installation and initial measurements from the FACET beamline.
In this article we describe the design and initial measurement results of revision 4 "rev4" of the Advanced ASoC Rapid Digitizer, Variable Readout Chip (AARDVARC). AARDVARC is a 8-channel waveform digitizing and processing Application Specific Integrated Circuit (ASIC) front-end. We will report on the diverse improvements from the previous design and detail the performance in comparison to the previous revision.
We study in detail the sensitivity of the Antarctic Impulsive Transient Antenna (ANITA) to possible $\nu_\tau$ point source fluxes detected via $\tau$-lepton-induced air showers. This investigation is framed around the observation of four upward-going extensive air shower events very close to the horizon seen in ANITA-IV. We find that these four upgoing events are not observationally inconsistent with $\tau$-induced EASs from Earth-skimming $\nu_\tau$, both in their spectral properties as well as in their observed locations on the sky. These four events, as well as the overall diffuse and point source exposure to Earth-skimming $\nu_\tau$, are also compared against published ultrahigh-energy neutrino limits from the Pierre Auger Observatory. While none of these four events occurred at sky locations simultaneously visible by Auger, the implied fluence necessary for ANITA to observe these events is in strong tension with limits set by Auger across a wide range of energies and is additionally in tension with ANITA's Askaryan in-ice neutrino channel above $10^{19}$ eV. We conclude by discussing some of the technical challenges with simulating and analyzing these near horizon events and the potential for future observatories to observe similar events.
In this article we describe the design of the HPSoC, a multi-channel waveform digitizing and processing Application Specific Integrated Circuit (ASIC) to readout fast and dense sensor arrays (e.g. LGADs). The chip will be able to service up to 100 channels, for bidimensional sensor arrays with a pitch of down to 300 um, operate with 10 GSa/s waveform digitization and use autonomous triggering, feature extraction and multichannel data fusion. In this paper, we present the architecture design, and the design and fabrication of a prototype with 4 channels to validate the components.
SymPET is a low-power, high channel density, waveform-digitizing readout microchip under development at Nalu Scientific for SiPM-based TOF PET applications. Our "System on Chip" waveform digitizing architecture includes features such as fully random accessible analog storage, input triggering, and on-chip biasing, control and waveform feature extraction capabilities, enabling many effective mechanisms to optimize features such as e.g., throughput, speed, and buffer length while simultaneously allowing excellent control of systematic effects which typically significantly affect the timing precision of time-over-threshold based readouts. Preliminary results show that SymPET can provide less than 10 ps timing jitter at a reasonable power budget which is substantially better compared to existing solutions. This will allow for high-channel density and/or limited angle applications such as ultra high resolution brain TOF PET designs that require proper management of heat dissipation, while necessitating high spatial and timing resolution.
In this article we describe the design and measurement results of the "UDC" - Ultrafast Pixel Array Camera Digitizer Chip. UDC is a 16-channel waveform digitizing chip with large buffer length (4096 samples per channel) and high timing performance (10Gsps sampling, <10ps resolution), suitable for applications such as High-Energy Density Plasma Diagnostics.
In this report we describe a novel pixelated diamond detector for the measurement and characterization of accelerator beam particle bunches both spatially and temporally by utilizing on-detector trace lithography and read out by system-on-chip (SoC) high density waveform digitizers developed by Nalu Scientific LLC (NSL). The theory, detection methodology, and planned instrumentation will be discussed, as well as initial measurements.
This paper presents measurements of the performance of the first revisions of the HDSoC, a waveform sampling ASIC optimized for high density photo-detectors, such as Silicon Photomultiplier (SiPM) or MA-PMTs. The first revision of HDSoC is operating at 1 Gigasample/sec waveform sampling with the ability to service 32 channels (the second revision is planned to cover 64 channels). The HDSoC is a System-on-Chip with built-in SiPM biasing, input TIA, with internally controlled digitization via a digital core that allows independent operation of each of the channels permitting low latency and high data rate, as well as multiple acquisition modes including dead timeless operation within a rate limit. In this paper we cover extensive test results and plans for future revisions.
We present preliminary results on the acquisition of fast silicon photomultiplier (SiPM) signals using HDSoC Version 1, capable of 1-2 giga samples per second (GSa/s) waveform sampling with 32 input channels. Each channel of the HDSoC prototype is aimed at digitizing fast signals from high-channel density SiPM arrays. In this paper, we discuss the estimation of energy (using the digitized signals) corresponding to the SiPM dark counts. The timing uncertainty between the input channels of the digitizer is also discussed.