This article presents an online efficiency optimization strategy for a digitally controlled, wide operating range silicon carbide based boost converter with bidirectional power flow. The proposed strategy minimizes switching losses at any given operating point by adjusting the converter switching frequency and dead times to optimally set the peak synchronous rectifier turn- off current. This results in the converter achieving zero-voltage switching quasi-square wave (ZVS-QSW) operation with minimum inductor current ripple. The optimal timing parameters are determined online by fit functions based on sensed input/output voltages and inductor current, and applied to the converter in a low-bandwidth feed-forward loop operating in conjunction with closed-loop regulation of the converter output voltage. The fit functions are developed from multivariate curve fitting of the analytical solutions of the minimum-conduction ZVS-QSW state plane over the complete range of operation. The proposed approach enables bidirectional operation with efficiencies greater than 97.5% for input voltages ranging from 200 to 400 V, step-up conversion ratios up to 2.5, and power levels between 2 and 8 kW. The converter also achieves efficiencies greater than 99% over wide power levels at boost conversion ratios lower than 2.
This article is focused on modeling and design optimization of high-current-ripple planar inductors in liquid-cooled high-power applications, such as electric-vehicle drivetrain systems, where efficiency and power density are the key performance metrics. The planar-inductor optimization is facilitated by innovations in computationally efficient and accurate models of ac winding loss and thermal management. A novel approximate analytical model for the ac winding loss takes into account effects of inside-the-core versus outside-the-core winding geometry as well as the air-gap fringing effect. Furthermore, thermal management strategies are introduced to enhance the vertical thermal flow from the core and the windings to the cold plate, leading to 2.5–3 times higher peak power capability compared with standard solutions. The developed modeling and optimization techniques are applied to planar inductor design in a 16.5-kW-rated SiC-based zero-voltage-switching quasi-square-wave boost converter, and the insights of selecting the core dimensions, number of turns and inductance are discussed in detail. The designed ELP 43-based planar inductor achieves a power density of 175.7 kW/L, and is experimentally validated on the converter prototype, achieving 98.8% efficiency at the typical 9.45-kW point, and less than 60 °C of worst-case temperature rise with a winding loss of 68 W in full power operation.
This article is focused on the thermal design and three-dimensional (3-D) package optimization of planar magnetic components (PMCs), including transformers and inductors for application in an electric vehicle composite boost dc–dc converter. Each PMC comprises electrical windings in printed circuit board (PCB) form in combination with a ferrite core. Multiple features of each PMC package are thermally optimized for the proposed device configurations with given core size, core loss distribution, number of turns in the PCB winding, winding copper thickness, and winding loss distribution. These heuristically optimized features include a lower level cold plate structure with a conformal base for enhanced convective heat transfer, an upper level PMC cap structure for doubled-sided cooling through conductive heat flow to the cold plate, the implementation of functionally distributed copper thermal and electrothermal vias in the PCB winding for improved cross-plane thermal conductance, and judicious implementation of select materials at various locations and interfaces within the package. Detailed numerical modeling reveals the combined effect of this 3-D packaging strategy with a 79.3 °C and 48.5 °C maximum temperature reduction in the core and PCB winding, respectively, relative to a baseline device configuration. Select PMC experimental validation confirms the expected thermal performance of an optimized PCB design. The thermal design approach is relevant for a range of high-power-density electronics PMC packaging applications.
A decentralized hierarchical control architecture is proposed for composite systems. Automatic mode transitions are performed in a high-level main controller using a state machine that commands references for each partial-power converter module. Local converter module controllers perform gain-scheduled average current control. It is observed during mode transitions, that when the boost module and the dual active bridge (DAB) module change their output voltage simultaneously, there are unwanted transients in the system that induce instabilities. These transients occur because the boost converter is unable to handle the required voltage step up during the turn on of the DAB converter. To mitigate these transients, a boost voltage reference dynamic alteration and DAB reference ramp offset strategy has been proposed in the paper. Mathematical evaluation of the state machine, condition for transient occurrence and mitigation strategies have been presented. Validation of the theoretical hypothesis is provided by simulations and controller-hardwarein-loop (CHIL) test bed results.
This paper presents analysis and modeling of differential-mode (DM) resonances due to interactions between inductances and parasitic winding capacitances in high frequency planar transformers, which may result in undesirable current ringing. These DM phenomena are fundamentally different compared to well-recognized and better understood common-mode (CM) issues. A simplified half-circuit model is developed based on the classical six-capacitor network model, and an analytical expression is derived for evaluation of the worst-case differential-mode current ringing. A direct relationship is found between the electric field energy storage and the DM current ringing. The modeling insights lead to improved design approaches for planar transformer and tank inductor windings in transformer isolated converters. The results are verified by experiments on a SiC-based dual-active-bridge converter prototype operating at 9 kW and 210 kHz.
1. Introduction: converter modeling approaches and objectives 2. Averaged switch modeling of PWM converters operating in the continuous conduction mode (CCM) • Basics of averaged switch modeling • Switch network steady-state and small-signal models • Using averaged-switch model to predict converter steady-state characteristics and small-signal dynamics in CCM • PSpice implementation of the averaged switch model • Application examples: small-signal dynamics, conduction losses and efficiency of a Sepic converter • Averaged switch modeling exercise: include switching losses
The paper is devoted to the reliability estimation of composite DC-DC converters. The reliability technique accounts for the probability of activation and deactivation of components at different points on the drive cycle to predict increased mean time to failure (MTTF) rating of the composite system by at least 20% compared to the conventional non-drive cycle based approaches. A relationship between optimal count of components and MTTF is also explored. It is observed that higher MTTF can be achieved by 21% for increase in component count by 12 compared to the existing design. Furthermore, analysis of the effects of redundancy of modules on the MTTF rating of the composite system is shown.
This paper presents an online optimization strategy for a silicon-carbide (SiC) based Boost converter where the converter switching frequency and dead times are adjusted to set the peak synchronous-rectifier (SR) turn-off current so that zero-voltage switching quasi-square-wave (ZVS-QSW) operation is achieved at any given operating point while minimizing inductor current ripple. The optimal converter switching frequency and dead times are determined based on sensed converter input/output voltages and inductor current using multidimensional parametric curve fit. These timing parameters are applied to the converter in a low-bandwidth feed-forward path operating in conjunction with closed-loop regulation of the converter output voltage. Experimental validation of the online optimization strategy is carried out on a 10kW, 600V converter prototype, demonstrating a close match between analytically computed and curve-fit based switching frequency and dead times over wide ranges of operating points. The proposed approach enables operation of the converter with efficiencies greater than 97.5% for input voltages ranging from 200V to 400V, conversion ratios up to 2.5, and power levels between 2kW and 8kW.
In a composite dc-dc converter, regulation and dual active bridge (DAB)-based fixed-ratio (DCX) modules are arranged to minimize stresses and losses over wide ranges of input and output voltages. The system relies on smooth mode transitions in which a DCX must be quickly powered up from zero output to its nominal fixed-ratio operation. In the case a DCX precedes a regulation stage, the DCX is exposed to a high input voltage, leading to a large inrush current during startup. In the case a DCX follows a regulation stage, the DCX needs to charge the output dc capacitor while simultaneously supplying a high load current. To address these challenges, a generalized DCX modulation scheme is proposed in this paper to maximize the average DCX output current and to enable soft startup transitions in the two configurations considered. The approach is verified by simulations and by experimental results on a 350 V, 25 kW SiC-based prototype.
This paper presents a modular control architecture for a composite dc-dc converter topology. A composite converter comprises multiple dissimilar partial-power converter modules arranged and operated to minimize stresses and improve system efficiency over a wide range of operating points. This requires transitioning to different operating modes for different operating conditions. A control strategy is required to determine the optimal mode, and to achieve smooth mode transitions and fast closed-loop system dynamic responses. A modular control architecture capable of meeting these objectives is described. In this architecture, low-level module controls are decoupled from system-level operations. The resulting hierarchical control strategy is relatively simple, and highly scalable in nature. The approach is developed and validated on a controller hardware-inthe-loop (CHIL) platform. A frequency scaling strategy is applied to allow validations of high-switching frequency converters on bandwidth-limited CHIL platforms.
This paper presents a boost dc-dc converter design that maximizes drive-cycle weighted efficiency based on the CAFE standard. A drive-cycle simplification approach is introduced to enable faster yet accurate CAFE-based optimization. The optimization is based on calibrated loss models, including soft switching operation in boundary conduction mode (BCM) using a compact planar inductor. An enhanced thermal management strategy based on additional thermally-conductive layers is proposed to address design limitations related to the planar inductor realization. The design approaches are verified on an experimental 400 V, 11 kW SiC boost converter prototype, which achieves 99% measured efficiency over a wide operating range, and a CAFE-weighted efficiency of 99.1%.
Electric vehicles (EVs) need high efficiency DC-DC converters to improve drive cycle performance. Asymmetric SiC multi-die configurations in half-bridge modules are shown to improve drive cycle efficiency in composite DC-DC converters for EVs. It is observed that 2:1, 3:1, 4:1 die configurations reduce the average drive cycle losses by 45.38%, 31.93%, 27.65% respectively for the buck converter, and 9.85%, 42.62%, 59.47% respectively for the boost converter compared to the preceding symmetric die configuration 1:1, 2:2 and 3:3 over the US06 drive cycle. Aspects of drive cycle based composite optimization with respect to device and quantity of die per switch position selection are detailed in the paper. All theoretical results are verified by experimental tests over multiple operating points.
A challenge with composite DC-DC converters is to fabricate a low profile system capable of operating over a wide range of source and load conditions with high efficiency and reliability. To address this challenge, a new US06 drive cycle weighted optimization algorithm is introduced in this paper. The algorithm has resulted in a 50 kW/250kHz SiC composite converter system leading to a volumetric power density of 24.7 kW/L, quality factor Q of 54.55 and a theoretical mean time to failure (MTTF) rate of 1,502 khrs over the US06 drive cycle which is superior by a factor of 1.25, 1.21, 1.4 to the existing work respectively. The proposed optimization strategy is a three-tier algorithm that accounts for virtual prototyping at component, module and system level and generates designs based on estimated performance limitations on efficiency, power density, reliability and costs. Furthermore, a comprehensive parametric loss modeling and thermal management analysis for different components have been discussed.