Magnetic intercalation in transition metal dichalcogenides enables robust ferromagnetism with chiral spin textures and topological transport in van der Waals materials. In this work, we present a single crystal FexTaS2 (x approximate to 0.4) exhibiting T-C = 54 K (similar to 20 K above the prototype x = 0.33 phase), enabled by enhanced Dzyaloshinskii-Moriya interaction (DMI) from higher intercalation without loss of crystal quality. Magnetization and heat capacity measurements confirm long-range Ising-type ferromagnetic order, with clear perpendicular magnetic anisotropy. X-ray magnetic circular dichroism uncovers a large unquenched orbital magnetic moment on Fe sites, driving a colossal magnetic anisotropy ratio of 0.133, via strong spin-orbit coupling. Fe intercalation introduces extra electronic states near the Fermi-level with a new pocket around the Gamma-point and reduced hole-pocket intensity, along with suppressing the charge density wave gap/splitting present in pristine TaS2, demonstrating effective electronic structure engineering in intercalated transition-metal dichalcogenides observed by angle-resolved photoemission spectroscopy data. Magneto-transport reveals anisotropic magnetoresistance with a butterfly-like behavior below T-C, and a field- and temperature-dependent Hall Effect featuring contributions from both anomalous Hall effect and topological Hall effect (THE). THE arising from DMI-stabilized chiral spin textures and spin fluctuations manifests as a clear kink in transverse resistance below T-C and persists robustly at low temperatures. These findings position Fe1/2.5TaS2 as a promising air-stable ferromagnet for exploring DMI-driven chiral phases and spintronic applications at higher temperatures.

Graph Neural Networks (GNNs) have emerged as the state-of-the-art graph learning method. However, achieving efficient GNN inference on edge devices poses significant challenges, limiting their application in real-world edge scenarios. This is due to the high computational cost of GNNs and limited hardware resources on edge devices, which prevent GNN inference from meeting real-time and energy requirements. As an emerging paradigm, device-edge co-inference shows potential for improving inference efficiency and reducing energy consumption on edge devices. Despite its potential, research on GNN device-edge co-inference remains scarce, and our findings show that traditional model partitioning methods are ineffective for GNNs. To address this, we propose GCoDE, the first automatic framework for GNN architecture-mapping Co-design and deployment on Device-Edge hierarchies. By abstracting the device communication process into an explicit operation, GCoDE fuses the architecture and mapping scheme in a unified design space for joint optimization. Additionally, GCoDE's system performance awareness enables effective evaluation of architecture efficiency across diverse heterogeneous systems. By analyzing the energy consumption of various GNN operations, GCoDE introduces an energy prediction method that improves energy assessment accuracy and identifies energy-efficient solutions. Using a constraint-based random search strategy, GCoDE identifies the optimal solution in 1.5 hours, balancing accuracy and efficiency. Moreover, the integrated co-inference engine in GCoDE enables efficient deployment and execution of GNN co-inference. Experimental results show that GCoDE can achieve up to 44.9x speedup and 98.2% energy reduction compared to existing approaches across diverse applications and system configurations.

Deep neural networks (DNNs) have become foundational to modern applications, yet their substantial computational and memory demands pose major obstacles to energy-efficient inference. Moreover, the rapidly expanding parameter footprint and structural diversity further amplify data movement, leading to substantial energy consumption and latency overheads. To address these issues, we propose a novel accelerator, S-TRAC , that dynamically adjusts sparsity t h r esholds through a lgorithm-hardware c o-design to enable efficient DNN inference. At the algorithm level, we employ a static sparse-dense storage format and a dynamic bit-processing scheme to skip non-contributing bits without sacrificing weight precision. At the hardware level, we introduce a column-wise processing-element array with LUT-based shift-accumulate multiplication and a global partial-sum accumulator to sustain energy-efficient execution. To support the proposed algorithm-hardware co-design, we propose a RISC-V extension that coordinates the read, arrangement, multiplication, accumulation, and write stages to support end-to-end accelerator execution. Experimental results show that S-TRAC increases effective sparsity by an average factor of 8.4 × across the evaluated DNN models, enabling substantial memory savings. S-TRAC design achieves 11.16 × energy efficiency and 37.03 × hardware efficiency improvements over state-of-the-art solutions.

Achieving stable magnetization in sub-10 nm ferromagnetic layers represents a fundamental bottleneck in spin-orbit torque magnetic random-access memory development. While exchange bias potentially offers stabilization at such scales through antiferromagnetic coupling, conventional lithography fundamentally limits nanoscale verification. Here, we introduce a lithography-free nanopatterning strategy exploiting individual carbon nanotubes as etching templates, enabling precise fabrication of exchange-biased heterostructures from tens of nanometers down to single-digit dimensions. In perpendicularly magnetized Pt/Co/IrMn stacks, we demonstrate robust exchange bias persistence even at sub-10 nm regimes and confirm effective spin-orbit torque switching through anomalous Hall effect measurements. Crucially, scaling reveals divergent switching mechanisms: Cobalt layers transition from multi-domain to abrupt single-domain reversal, while exchange bias switching maintains gradual characteristics consistent across sizes - indicating collective antiferromagnetic moment reorientation via exchange-spring dynamics. This work enables the physical patterning of sub-10 nm features for exchange bias stabilization, provides mechanistic insights into nanoscale magnetic switching, and establishes a viable pathway toward high-density spintronic memories.

Unconventional antiferromagnets (AFMs) with spin splitting have garnered significant interest due to their unique characteristics. Conventionally, anomalous Hall effects (AHE) in AFMs are generally observed in both triangular AFM structures and altermagnets. Expanding the AFM structures capable of generating spontaneous AHE is an important direction. In this study, a giant anomalous Hall conductivity (AHC) exceeding 180 S cm-1 is observed in the M-1 phase of Mn3GaN. Through electronic transport measurements, it demonstrates that the AHE primarily originates from the new tetragonal AFM structure in the M-1 phase. First-principles calculations show that the AHE arises from a non-zero Berry curvature integration over the Brillouin Zone, which is linked to slight spin canting that breaks time-reversal symmetry. This findings offer a new candidate for unconventional AFMs, and pave the way for the development of topological physics and AFM spintronics.

Physics-inspired Ising machines are emerging as promising hardware alternatives to traditional von Neumann architectures for tackling computationally intensive combinatorial optimization problems (COPs). However, the practical application of existing quantum, optical, and electronic platforms is fundamentally constrained in speed and scalability by the physical mechanisms governing their spin dynamics. Here, we report, to our knowledge, the first complementary metal-oxide-semiconductor-integrated chip-scale spintronic Ising machine that enables sub-nanosecond probabilistic spin updates. Exploiting the voltage-controlled magnetic anisotropy effect in dense magnetoresistive random access memory, our design eliminates large write currents and achieves a tunable 0-100% single-pulse switching probability via pulse-width control. Compared with prior spintronic implementations, it achieves a simultaneous 100× improvement in spin-update speed (0.3-1 ns) and energy efficiency (< 40 fJ). Leveraging the all-to-all Ising machine implemented on-chip, we validate its generality on industry-relevant COPs in the electronic design automation domain, including global routing and layer assignment, attaining high-quality solutions with a system energy efficiency of 2.5×104 solutions per second per watt. This performance outperforms state-of-the-art quantum and graphics processing units by six and seven orders of magnitude on identical benchmarks, respectively. Our results open the sub-nanosecond regime of probabilistic spin updates in a chip-scale Ising machine, establishing spintronics as a compelling route for ultra-fast and scalable physics-inspired intelligence.

α-MnTe is among the earliest discovered altermagnets with experimental evidence of A-type antiferromagnetic order above room temperature and spin-split bands. Here, we conduct a theoretical investigation of its magnetism based on the general symmetry-adaptive tensorial spin model, which not only confirms a Néel temperature of 340 K induced by the dominant 1st and 3rd nearest-neighbor Heisenberg exchanges, but also the hexagonal planar Néel vector polarization of the ground state due to both the single-ion and the two-ion anisotropies. The 6-fold rotation symmetry along z prohibits an in-plane easy axis when only considering rank-2 and rank-4 interactions, revealing the continuous ground state degeneracy. Subsequently, we show that the triple-resistance states can be realized by adopting MnTe as the barrier in the sandwiched magnetic tunnel junctions. By deliberately matching the Brillouin zone-resolved spin transport of both the barrier and the electrode, tunneling magnetoresistance up to ~5300% is obtained. Our work not only provides a fine database of the magnetism and transmission for MnTe, but also sheds light on the application in high-density spintronic memory devices.

Interlayer Dzyaloshinskii-Moriya interaction (IL-DMI) in synthetic magnetic structures has attracted extensive interest for greatly facilitating deterministic spin-orbit torque (SOT)-driven information writing and topologically non-trivial 3D magnetic Hopfion forming. However, its distinct role in synthetic ferrimagnets (SFi) remains unexplored, where the conjunction of asymmetric magnetic moments and antisymmetric nature of IL-DMI leads to more diverse spin configurations and applications. Here, we reveal the unidirectional and chiral nature of IL-DMI in SFi, further unlocking application directions of IL-DMI in neuromorphic computing. Particularly, the IL-DMI-induced effective field increases approximately twentyfold while interacting with two asymmetric antiparallel-aligned moments, greatly facilitating future IL-DMI detection. Unlike previous digital-like switching, we find that the interplay of IL-DMI, SOT, and thermal effect gives rise to an analog-like switching behavior. Leveraging this, we develop an SOT-based non-probabilistic leaky-integrate-fire neuron device utilizing the micromagnetic analog-like switching model. Compared to probabilistic neurons, this provides a hardware support Spiking neural network, interlayer Dzyaloshinskii-Moriya interaction, spin-orbit torque, synthetic ferrimagnetsfor ultralow power, high-sparsity, and high-accuracy spiking neural networks.

Magneto-electric spin-orbit logic requires efficient spin-charge interconversion in scalable geometries. Here, we use Co/Pd heterostructures as a model system to demonstrate local spin-orbit readout at a ferromagnetic Rashba-Edelstein interface, where conversion occurs directly at the magnetic boundary without non-local diffusion. After removing spurious Hall and geometric contributions, the readout signal exceeds that expected from the bulk spin Hall effect of Pd and obeys Onsager reciprocity, indicating a dominant interfacial origin. Modest interfacial pre-activation reproducibly enhances the signal by nearly a factor of two. The enhancement underscores the strong interfacial sensitivity of the induced spin-charge conversion, while ferromagnetic resonance and harmonic spin-orbit torque measurements show only minor changes in magnetic and torque properties, consistent with reduced interfacial spin-memory loss being a contributing factor.

Antiferromagnetic spintronics offers a transformative route toward high-density and ultrafast memory technologies. However, probing and manipulating spin dynamics in antiferromagnets remain highly challenging due to their nearly vanishing net magnetization and intrinsically complex magnetic structures. A long-standing puzzle in this field is the anomalous phase shift observed in spin Hall magnetoresistance (SMR) measurements, which has recently been attributed to altermagnetic spin splitting effect. In this work, we demonstrate that such an anomalous phase shift also emerges in nonaltermagnetic materials. By investigating the microscopic interplay between the Neel order and canted spin polarization in fully epitaxial BiFeO3/SrRuO3 heterostructures, we provide a comprehensive explanation for this intriguing phenomenon. Through a combination of angle-dependent transport measurements and first-principles calculations, we show that the SMR signal is governed by two competing mechanisms: a robust contribution originating from the antiferromagnetic Neel vector (NSMR) and a highly temperature-sensitive component arising from ferromagnet-like canted spin polorization (PSMR) which is constrained by the symmetry-allowed Dzyaloshinskii-Moriya coupling. We further reveal that the elusive phase shift stems from the rapid enhancement of the canted spin polarization at low temperatures, which fundamentally alters the symmetry of spin-current absorption. Our findings establish a unified physical framework for disentangling complex spin interactions in antiferromagnetic materials.

Low-dimensional van der Waals semiconductors with reduced symmetry provide a unique platform for exploring anisotropic physical properties. The quasi-one-dimensional family MXQ_3 (M = Hf, Zr; X = Sn; Q = S, Se) exhibits notable structural anisotropy, where zigzag atomic chains influence optical phenomena such as birefringence. This study investigates anisotropic lattice dynamics in ZrSnS_3 using angle- and polarization-dependent Raman spectroscopy. Temperature-dependent measurements reveal anharmonic phonon behavior, indicating strong phonon-phonon coupling. Density functional theory calculations show good agreement with the experimentally observed Raman spectra, validating the microscopic description of the lattice dynamics. We also observe a helicity-dependent intensity and a reversal in phonon intensity between lower- and higher-frequency modes under circularly polarized light, which is characteristic of chiral phonons governed by the polarization of the Zr/Sn chains. Our first-principles analysis further shows that angular-momentum-like phonon textures can emerge away from the Γ-point near mode-hybridization and avoided-crossing regions, providing microscopic insight into the observed helicity-dependent Raman signatures. Furthermore, we fabricate an optoelectronic device from a thin ZrSnS_3 nanowire, demonstrating a photoresponsivity of 50 mA/W under 520 nm laser excitation (1 mW/cm^2). The device exhibits a pronounced, power-scalable anisotropic photoresponse with a clear preferred polarization direction. These results highlight the coupling mechanisms between polarization, lattice vibrations, and charge carriers in ZrSnS_3, establishing it as a promising material for polarization-sensitive optoelectronics and directional quantum transport.

Deep neural network (DNN) accelerators integrated with RISC-V Instruction Set Architecture (ISA) extensions have enabled efficient computing on resource-constrained platforms. However, their specialization in regular compute patterns limits effectiveness on irregular workloads, making it challenging to achieve high throughput and energy efficiency. To tackle these challenges, we present ReNN-RV, which integrates a computation-aware RISC-V ISA extension with an instruction-driven processing pipeline to efficiently accelerate run-time reconfigurable processing elements (RePEs). The computation-aware ISA employs configurable opcodes and custom encodings to support fine-grained task scheduling, while an instruction-driven pipeline implements it with minimal control complexity. Moreover, the RePE accelerator provides seamless switching between multiply-accumulate (MAC) and non-MAC operations by configuring a path multiplexer to realize multiple operators at run time. Experimental results demonstrate that ReNN-RV achieves average reductions of 14.6 & times; in cycle count and 15.3 & times; in execution time across representative DNN workloads compared with the baseline RISC-V design. On average, ReNN-RV outperforms state-of-the-art designs by 10.1 & times; for energy efficiency and 10.3 & times; for computational throughput.

As transistor sizes continue shrinking, the impacts of variability have become ever more paramount in circuit design and manufacturing. Their accurate representations in model cards help save design margins and provide appropriate guidelines in design technology co-optimization (DTCO). To address such a challenge, we propose a novel machine learning framework, normalizing flow-based joint generative (NFGen) model, which generates a comprehensive model library from a limited number of model cards. Unlike traditional generative methods that focus on the marginal distribution of model card parameters, NFGen is the first model to approximate their joint distribution, which includes information on their correlation and thus enables closer representation of variability effects. In addition, we introduce two similarity metrics to rigorously evaluate the quality of generated model cards. Experimental results show that NFGen reduces overall error by 2 & times; to 8 & times; compared to state-of-the-art methods, validating its superiority in variability-aware DTCO.

As an antisymmetric exchange interaction, the Dzyaloshinskii-Moriya interaction (DMI) favors canted spin alignment and stabilizes chiral spin textures. However, the existing DMI effects, e.g., interfacial DMI, bulk DMI, and interlayer DMI, cannot achieve long-range characteristics and vertical chirality simultaneously, hindering the implementation of three-dimensional (3D) topological magnetic textures. Here, we first achieve a bulk-like interlayer DMI (BIL-DMI) effect in gradient magnetic multilayers by engineering in-plane (IP) and out-of-plane (OOP) symmetry breaking, which presents unprecedented long-range vertical chirality. The direction and magnitude of the BIL-DMI-induced IP/OOP DMI effective fields depend on the DMI gradient, and the OOP effective field exhibits exotically linear dependence on external magnetic fields, distinctly different from the existing saturation behaviors of interlayer DMI. Moreover, a continuum model is built to explain the mechanism of BIL-DMI and quantitatively describe the experimental observations. Based on the BIL-DMI, unique 3D transverse skyrmion/bimeron strings applicable to next-generation magnonic circuits are first stabilized in theory, which is unachievable relying on existing DMI effects. The discovery of BIL-DMI achieves access to a long-range version of IL-DMI through gradient engineering, providing a platform for the investigation and application of 3D topological magnetic textures.

Spiking neural networks (SNNs) have emerged as a promising paradigm for effective event-driven computation. However, CMOS-based SNN designs are limited by power consumption and complexity, while nonvolatile memory (NVM)-based SNN designs often lack biological characteristics and require active capacitive circuits to emulate neuronal dynamics. In this paper, we propose a thermally interplayed spin-orbit torque magnetic tunnel junction (TI-MTJ) macro that integrates core SNN functionalities. Our neuron array autonomously achieves leaky integrate-and-fire (LIF) model within the TI-MTJ device, thus improving power efficiency and simplifying circuit structure. Additionally, the proposed synaptic array provides adaptive in-situ responses based on a simplified spike-timing-dependent plasticity (STDP) rule. To enhance biological plausibility, our macro incorporates real-time spike monitoring and inhibition mechanisms. A comprehensive device-circuit-algorithm co-optimization framework validates the high performance of the TI-MTJ macro, achieving a synaptic energy consumption of 6.07fJ per spike, an inference accuracy of 97.76% on the MNIST dataset, and an energy efficiency of 22.8TOPS/W.

Altermagnetic materials have recently broken through the spin degeneracy limitation of conventional antiferromagnetic tunnel junctions, offering new opportunities for developing novel spintronic devices. However, maintaining high thermal stability and significant tunneling magnetoresistance (TMR) while utilizing altermagnetic semiconductors to simplify device architecture remains a key challenge for achieving high-density storage devices. This work presents a tunnel junction based on a V2Se2O/Fe2B van der Waals heterostructure. By exploiting the spin-splitting effect in the momentum space of altermagnetic materials, this structure overcomes the inability to achieve TMR in conventional antiferromagnetic tunnel junctions due to spin degeneracy. Simultaneously, the exchange bias effect at the ferromagnetic/altermagnetic interface effectively enhances the thermal stability of the ferromagnetic layer, replacing the conventional synthetic antiferromagnetic pinning layer and significantly simplifying the device architecture. First-principles calculations based on density functional theory combined with non-equilibrium Green's function demonstrate that the V2Se2O/Fe2B heterostructure achieves a TMR of 283% at room temperature, with further optimization potential through material doping or electrostatic gating. This study demonstrates the feasibility and application prospect of altermagnetic materials in next-generation spintronic memory devices, while substantially reducing structural complexity and enhancing thermal stability.

Hardware-based security primitives have become critical to enhancing information security in the Internet of Things (IoT) era. Physical unclonable functions (PUFs) utilize the inherent variations in the manufacturing process to generate cryptographic keys unique to a device. Reconfigurable PUFs can update cryptographic keys for enhanced security in dynamic operational scenarios involving huge amounts of data, which makes them suitable for implementation in CMOS-integrated spin-orbit torque magnetic random access memory (SOT-MRAM) chips. However, a key challenge is achieving real-time reconfiguration independent of the environmental conditions, particularly the operating temperature. We propose a dual-pulse reconfiguration strategy for PUF design in CMOS-integrated SOT-MRAM chips that effectively widens the operating window and achieves resilience across a wide range of operating temperatures without the need for dynamic feedback that overly complicates circuit design. The proposed strategy lays a solid foundation for the next generation of hardware-based security primitives to protect IoT architectures.