Characterization of Soft Errors Caused by Single Event Upsets in CMOS Processes
IEEE Transactions on Dependable and Secure Computing（2004）
摘要
Radiation-induced single event upsets (SEUs) pose a major challenge for the design of memories and logic circuits in high-performance microprocessors in technologies beyond 90nm. Historically, we have considered power-performance-area trade offs. There is a need to include the soft error rate (SER) as another design parameter. In this paper, we present radiation particle interactions with silicon, charge collection effects, soft errors, and their effect on VLSI circuits. We also discuss the impact of SEUs on system reliability. We describe an accelerated measurement of SERs using a high-intensity neutron beam, the characterization of SERs in sequential logic cells, and technology scaling trends. Finally, some directions for future research are given.
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关键词
cmos processes,design parameter,radiation-induced single event upset,single event upsets,sequential logic cell,soft error rate,soft error,charge collection effect,logic circuit,accelerated measurement,vlsi circuit,indexing terms,sequential circuits,reliability,fault tolerance,cmos integrated circuits,vlsi,integrated circuit design
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