QPACE: Quantum Chromodynamics Parallel Computing on the Cell Broadband Engine

Computing in Science and Engineering(2008)

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摘要
Application-driven computers for lattice gauge theory simulations have often been based on system-on-chip designs, but the development costs can be prohibitive for academic project budgets. An alternative approach uses compute nodes based on a commercial processor tightly coupled to a custom-designed network processor. Preliminary analysis shows that this solution offers good performance, but it also entails several challenges, including those arising from the processor's multicore structure and from implementing the network processor on a field-programmable gate array.
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qcd,suitable performance,application-optimized network processor,cell broadband engine,network processor,quantum chromodynamics,system-on-chip,gauge field theory,field programmable gate array,torus network,performance modeling,system-on-chip designs,lattice gauge theory,corresponding hardware benchmarks,lattice quantum chromodynamics,parallel computing,field-programmable gate array,qpace architecture,field programmable gate arrays,parallel machines,massively parallel computing,lattice qcd code performance,system on a chip,mathematical model,parallel computer,bandwidth,computer architecture,lattices,system on chip
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