Low Cost Dynamic Test Methodology for High Precision ΣΔ ADCs

In this paper, a low-cost test methodology for dynamic specifications of high precision sigma-delta (∆Σ) analog-to-digital converters (ADCs) is presented. Dynamic testing of ADCs requires an input test stimulus with total harmonic distortion (THD) and signal-to-noise ratio (SNR) about 10dB better than the ADC under test. ∆Σ ADCs are inherently high resolution converters with excellent THD and SNR due to their inherent over-sampling, averaging and noise shaping properties. In the proposed test methodology, the back end digital and decimation filters of such converters are turned off and the digital pulse sequence at the output of the sigma-delta modulator is made externally observable for test purposes. It is seen that ENOB, THD and SNR of the converter can be determined with significantly increased sensitivity to device nonlinearities and noise allowing the use of less than ideal input stimulus than otherwise or significantly reduced test time. The back-end filters are then tested using traditional digital test techniques. Simulation results show the usefulness of the proposed test methodology.