Efficient Timing Analysis With Known False Paths Using Biclique Covering

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(2007)

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摘要
We improve the efficiency of static timing analysis when false paths are considered. The efficiency of timing analysis is critical for the performance driven optimization program because timing analysis is invoked heavily in the inner loop. However, when false paths are dealt with in timing analysis, a large number of tags needs to be created and propagated, thus deteriorating efficiency. In this paper, we minimize the number of the tags through a biclique-covering approach, which iteratively removes a tag if the false path information in the tag is covered by the union of other tags. With the produced tags, we remove the false path timing and guarantee to cover the nonfalse path timing. Since the minimum biclique covering of the general bipartite graph is NP complete [ Indag. Math., vol. 39, p. 211, 1977], [ Discrete Math., vol. 149, no. 1-3, p. 159, 1996], we use a minimal degree ordering approach to perform the biclique-covering minimization. The experimental results show significant reduction on the number of tags
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关键词
minimal degree ordering approach,false path,bipartite graph,NP complete,false path timing,static timing analysis,Biclique covering,circuit analysis computing,biclique-covering minimization,biclique covering minimization,circuit optimisation,timing,large number,discrete math,efficient timing analysis,false path information,known false paths,directed graphs,minimisation,driven optimization program,biclique-covering approach,timing analysis,false subgraphs,biclique covering,nonfalse path timing
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