A high-input-swing common-mode-robust programmable gain amplifier in 65nm CMOS.

A single-stage programmable gain amplifier (PGA) for SoC-integration with 50dB gain range and >; 30MHz signal bandwidth is implemented in a digital 1.0V 65nm CMOS process with thick gate oxide option. It uses a fully-differential four-stage operational amplifier, compensated with active feedforward and frequency selective gain-stage fading, as well as distributed common-mode feedback. The opamp input stage features a special design to achieve high robustness against common-mode disturbers at the input pins for operation in a noisy mixed-signal environment. The PGA consumes in total 25mW from a split 1V/2.5V supply, while delivering a differential voltage swing of 1Vpp into an 800Ω differential on-chip load with IM3 >; 70dB at 12dB voltage gain for signal frequencies up to 30MHz. The PGA supports a maximum differential input voltage swing of >;6Vpp and is robust against a 150mVpp common-mode disturber with a common-mode × signal cross modulation of <; -70dBc.