Energy-Efficient Packet Processing

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摘要
Packet processing systems (e.g., routers, virus scan- ners, intrusion detectors, SSL accelerators, etc.) pro- vision sufficient number of processors to handle the ex- pected maximum workload. The observed load at any in- stant, however, is often substantially lower; further, the load fluctuates significantly over time. These properties offer an opportunity to conserve energy (e.g., by deac- tivating idle processors or running them in low-power mode). In this paper, we present an on-line algorithm for adapting the number of activated processors such that (1) the total energy consumption of the system across a packet trace is minimized and (2) the additional delay suffered by packets as a result of adaptation is determin- istically bounded. The resulting Power Management Al- gorithm (PMA) is simple, but it accounts for system re- configuration overheads, copes with the unpredictability of packet arrival patterns, and consumes nearly the same energy as an optimal off-line strategy. A conservative ver- sion of the algorithm (CPMA), turns off processors less aggressively than is optimal but still provides good en- ergy savings while reducing the additional packet latency introduced by power management. We demonstrate that for a set of trace workloads both algorithms can reduce the core power consumption by 60-70% while increasing the average packet processing delay by less than 560µs (PMA) and less than 170µs (CPMA).
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