BER Measurement of a 5.8-Gb/s/pin Unidirectional Differential I/O for DRAM Application With DIMM Channel

Young-Chan Jang,Hoeju Chung,Youngdon Choi,Hwanwook Park,Jaekwan Kim,Soouk Lim,Jung Sunwoo,Moon-Sook Park,Hyung-Seuk Kim,Sang-Yun Kim,Yun-Sang Lee,Woo-Seop Kim,Jung-Bae Lee,Jeihwan Yoo,Changhyun Kim

IEEE Journal of Solid-State Circuits（2009）

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摘要

A 1-Gbit DRAM with 5.8-Gb/s/pin unidirectional differential I/Os was implemented by 70 nm DRAM process and a main memory module with dual in-line memory module was assembled. The implemented DRAM chips have control methods for core noise injection and a cyclic redundancy check (CRC) generator for outer-data inner-command architecture. Measurements for bit error rate and jitter performance of the t...

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关键词

Bit error rate,Random access memory,Cyclic redundancy check,Working environment noise,Assembly,Noise generators,Electric variables measurement,Semiconductor device measurement,Jitter,Transmitters

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