Methodology for improvement of data retention in floating gate flash memory using leakage current estimation.

The importance of data retention characteristic is increased as the memory has been scaled down and multi-level programming. The leakage current of the inter-poly dielectric (IPD) at low electric field is related with data retention and the charge of the threshold voltage distribution is increased when the number of storage charges in the floating gate is increased. In order to improve data retention characteristics, the minimization of leakage current variation with respect to the applied electric field on IPD is necessary. In this paper, the effect of the electric potential of IPD on the leakage current is examined and the leakage current at low electric field is predicted. Based on the results, the method for improving the data retention by reducing the leakage current is proposed.