An Adaptive PAM-4 5 Gb/s Backplane Transceiver in 0.25 um CMOS

This paper describes a novel backplane transceiver, which uses PAM-4 (pulse amplitude modulated four level) sig- nalling and continuously adaptive transmit based equalization to move 5 Gcb/s (channel bits per second) across typical FR-4 back- planes for total distances of up to 50 inches through two sets of backplane connectors. The paper focuses on the implementation of the equalizer and the adaptation algorithms, and includes measured results. The 17 mm2 device is implemented in a 0.25um CMOS process, operates on 2.5 V and 3.3 V supplies and consumes 1.2 W. I. INTRODUCTION The need to switch and route the increasing amounts of data traffic resulting from the recent explosion in Internet usage has made the backplane the critical bottleneck in net- working infrastructure. Technical advances in optical links and supporting electronics have increased not only the speed of each port but also the total number of ports in a system. During this same time frame backplane materials and connec- tors have improved very little. Thus, the distortions arising from skin effect, dielectric losses and reflections, which are frequency-dependent, have become increasingly problematic as symbol rates have increased. The effects of these problems