Going with the flow: bridging the gap between theory and practice in physical design.

A practical Physical Design flow is an intricate chain of many algorithms. Assorted placers and routers are interspersed with incremental logical synthesis algorithms that patch up timing. The overall goal is to address a plethora of design objectives simultaneously such as LVS/DRC correctness, speed, area, power and yield. Each new technology node adds additional complications to flow. Increased crosstalk sensitivity, and tighter power and yield requirements are currently causing havoc in 28nm. EDA research has been focused primarily on improving individual algorithms. Over the past decade ISPD has hosted contests to find the best placement and global routing tool. Though important, does it really matter for each algorithm to be optimal? And what does "optimal" mean given the many conflicting objectives? This presentation focuses on the overall flow issues based on the experiences with a state-of-the-art commercial physical design toolset. It is important to be up-front about priorities in a multi-objective design flow. Which effects dominate and which can be addressed incrementally? It is surprisingly hard to get good results from an algorithm that uses conflicting objectives in its cost function. Instead, it is often preferable to let each algorithm address only a single issue and patch up the less important ones incrementally in the next steps. This presentation also addresses the "bumpiness" of multi-algorithm flows. The many local optima and limited experimental evidence make it hard to properly tune the chain of algorithms.