A 100-Mhz 64-Tap Fir Digital-Filter In 0.8-Mu-M Bicmos Gate Array

T. Yoshino,R. Jain, E T. Yang, H. Davis,W. Gass,A. H. Shah

IEEE JOURNAL OF SOLID-STATE CIRCUITS(1990)

引用 57|浏览10
暂无评分
摘要
A 64-tap FIR (finite impulse response) digital filter that has been designed using a newly developed filter compiler and fabricated in a 0.8- mu m triple-level interconnect BiCMOS gate array technology is presented. The filter has been tested and is fully functional at a 100-MHz clock rate. These results are obtained by combining an optimized architecture and gate array floorplan with submicromete...
更多
查看译文
关键词
Finite impulse response filter,Digital filters,BiCMOS integrated circuits,Prototypes,Instruments,Throughput,Laboratories,Frequency domain analysis,Testing,Clocks
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要