Analysis of Loop Behavior of Selectable Mode Vocoder (SMV) and Its Impact of Instruction Level Parallelism

The digital signal processor (DSP) industry has been growing steadily over the past few years due to strong demands for digital signal processors in a variety of applications. Among these applications, wireless communication accounts for more than two-thirds of the DSP market today. The Selectable Mode Vocoder (SMV) is a third generation (3G) speech coding technology that provides significant capacity and quality improvements over the second generation. SMV is very complicated and its implementation requires much CPU time and memory space. It has therefore been a challenge to implement SMV efficiently on a DSP chip. We present in this paper a thorough analysis of loop behavior in SMV because DSP processors spend most of their time in loops. We also evaluate the impact of the behavior of the loops on instruction level parallelism. Our motivations are: 1. to identify typical and frequently executed functions as potential new DSP benchmarks, and 2. to obtain information that might lead to the improvement on the designs of DSP optimizing compilers and architecture of DSP processors. We first developed our own profiling tool, which is capable of operating at both function and loop levels. We also used static analysis in combination with dynamic measurement techniques to characterize the behavior of the loops. Based on the data collected from more than 250 loops selected from the frequently executed functions of SMV, we present 1. basic data on the SMV program such as the number of weighted DSP operations, 2. the behavior of various loops such as the maximum and minimum numbers of loop iterations; loop types; number of exits from and number of conditional branches in loops; characteristics of the nested loops; and the distribution of various kinds of DSP operations in loops. All data are analyzed and discussed in the context of architecture of DSP processors and instruction level optimization approaches to DSP compilers.