Pangaea: A Tightly-Coupled Ia32 Heterogeneous Chip Multiprocessor

Moore's Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneous CMP design for non-rendering workloads that integrates IA32 CPU cores with non-IA32 GPU-class multicores, extending the current state-of-the-art CPU-GPU integration that physically "fuses" existing CPU and CPU designs. Pangaea introduces (1) a resource repartitioning of the CPU, where the hardware budget dedicated for 3D-specific graphics processing is used to build more general-purpose CPU cores, and (2) a 3-instruction extension to the IA32 ISA that supports tighter architectural integration and fine-grain shared memory collaborative multithreading between the IA32 CPU cores and the non-IA32 CPU cores. We implement Pangaea and the current CPU-GPU designs in fully-functional synthesizable RTL based on the production quality RTL of an IA32 CPU and an Intel GMA X4500 CPU. On a 65 nm ASIC process technology, the legacy graphics-specific fixed-function hardware has the area of 9 CPU cores and total power consumption of 5 CPU cores. With the ISA extensions, the latency from the time an IA32 core spawns a CPU thread to the time the thread begins execution is reduced from thousands of cycles to fewer than 30 cycles. Pangaea is synthesized on a FPCA-based prototype and runs off-the-shelf IA32 OSes. A set of general-purpose non-graphics workloads demonstrate speedups of up to 8.8x.