Compact modeling of amorphous-silicon thin-film transistors with BSIM3

A novel approach of modeling a-Si: H TFTs with the industry-standard BSIM3 compact model is presented. The described approach defines the a-Si: H TFT drain current and terminal charges as explicit functions of terminal voltages using a minimum set of BSIM3 parameters. The set of BSIM3 parameters is chosen based on the electrical and physical characteristics of the a-Si: H TFT and their values extracted from measured data. By using the selected BSIM3 model parameters, the a-Si: H TFT is simulated inside SPICE to fit the simulated I-V and C-V curves with the measured results. Finally, the extracted BSIM3 model is validated by simulating the kickback voltage effect in an AMLCD pixel array.