A 45nm 37.3GOPS/W heterogeneous multi-core SoC

Yoichi Yuyama,Masayuki Ito,Yoshikazu Kiyoshige,Yusuke Nitta, S. Matsui,Osamu Nishii,Atsushi Hasegawa,Makoto Ishikawa,Tetsuya Yamada,Junichi Miyakoshi,Koichi Terada,Tohru Nojiri, Masashi Satoh,Hiroyuki Mizuno,Kunio Uchiyama,Yasutaka Wada,Keiji Kimura,Hironori Kasahara,Hideo Maejima

ISSCC（2010）

引用 63|浏览38

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摘要

A 648 MHz 153.8 mm2 45 nm CMOS SoC integrates eight general-purpose CPUs, four dynamically reconfigurable processors, two 1024-way matrix-processors, peripherals and interfaces. Using core enhancement, DDR3-I/F improvement and clock buffer deactivation, this SoC achieves 37.3 GOPS/W at 1.15 V.

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关键词

cmos soc,cmos integrated circuits,voltage 1.15 v,microprocessor chips,size 45 nm,general purpose cpu,dynamically reconfigurable processor,system-on-chip,matrix processor,clock buffer deactivation,heterogeneous multi-core soc,iron,system on a chip,system on chip,central processing unit

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