Low noise rf cmos receiver integrated circuits

For a low-cost and fully-integrated chipset, a direct- conversion architecture has been widely used in wireless receivers. In addition, a standard complementary metal oxide semiconductor (CMOS) process has been broadly applied in implementations of wireless receivers because it is capable of high level integration with a baseband chipset. RF CMOS components for direct-conversion architectures offer not only a small-sized mobile terminal, but also a low-cost device with low power consumption. Moreover, for practical versatility, wideband RF CMOS components need to be used in high data-rate applications, such as 4G wireless communications, and multi-standard applications. For these applications, the noise of the RF components needs to be designed as low as possible since the mobile terminals for these applications require high signal-to-noise ratio (SNR) performance.The objective of this research is to design and implement low-noise wideband RFIC components with CMOS technology for the direct-conversion architecture. This research proposes noise reduction techniques to improve the thermal noise and flicker noise contribution of a low noise amplifier (LNA) and a mixer. Of these techniques, the LNA is found to reduce noise, boost gain, and consume a relatively low amount of power without sacrificing the wideband and linearity advantages of a conventional common gate (CG) topology. The research concludes by investigating the proposed mixer topology, which senses and compensates local oscillator (LO) phase mismatches, the dominant cause of flicker noise.