Adaptive Processor Allocation in Packet Processing Systems

The functionality of packet processing applications is of- ten partitioned into pipeline stages; these stages are al- located a subset of the multiple processors available in a packet processing system. The workload, and hence the processing requirement, for each pipeline stage fluctu- ates over time. Adapting processor allocations to pipeline stages at run-time can improve robustness of the system to traffic fluctuations, can reduce processor provisioning requirement of the system, and can conserve energy. In this paper, we present an on-line algorithm for adapting processor allocations while ensuring that the additional delay suffered by packets as a result of adaptation is deter- ministically bounded. The resulting Processor Allocation Algorithm (PAL) is simple, but it allocates only as many processors to stages as needed to meet packet delay guar- antees, accounts for system reconfiguration overheads, and copes with the unpredictability of packet arrival pat- terns. A key contribution of PAL is its generality; it cap- tures the adaptation opportunities in the system as a finite state automaton (FSA)—the methodology for constructing the FSA can be applied to a variety of application require- ments and system configurations. We demonstrate that for a set of trace workloads PAL can reduce processor pro- visioning level by 30-50%, reduce energy consumption by 60-70% while increasing the average packet processing delay by less than 150µs. We describe our prototype im- plementation for Intel's IXP2400-based packet processing system.