A 4.2-ps ECL ring-oscillator in a 285-GHz f max SiGe technology

B. Jagannathan,M. Meghelli,A.V. Rylyakov, R.A. Groves, A.K. Chinthakindi, C.M. Schnabel, D.A. Ahlgren, G.G. Freeman, K.J. Stein,S. Subbanna

IEEE ELECTRON DEVICE LETTERS（2002）

引用 29|浏览49

暂无评分

摘要

This letter reports on the room temperature operation of a conventional SiGe bipolar ECL ring oscillator with a minimum stage delay of 4.2 ps for /spl sim/250 mV single ended voltage swing. To our knowledge, this is the lowest reported delay for a gate fabricated using transistor devices. The circuit uses 0.12 × 2 μm2 emitter size SiGe n-p-n transistors with a room temperature fT of 207 GHz and fm...

查看译文

关键词

Silicon germanium,Germanium silicon alloys,Ring oscillators,Circuits,Heterojunction bipolar transistors,Temperature,Delay effects,Costs,CMOS technology,Silicon on insulator technology

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要