SML2004-0062: Long wires and asynchronous control

msra

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摘要
As integrated circuit technologies get smaller, cir- cuit and architectural trends make transmitting data across long on-chip wires increasingly important yet increas- ingly expensive in both latency and throughput. Insert- ing repeaters can reduce latency by breaking up long wires with gain stages but offers only limited throughput im- provement, while breaking long wires with clocked latches improves latency and throughput but requires generat- ing fast local clocks. In contrast, asynchronous handshak- ing over long wires can improve both latency and band- width with lower control overhead. We introduce simple latency models that relate best stage separation to technol- ogy parameters. In addition, the transactional nature of handshaking presents a fundamental limitation on through- put exacerbated by long wires. We present a twin re- quest/acknowledge control scheme that overcomes this throughput cost.
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