Optimisation des memoires dans le flot de conception des systemes multiprocesseurs sur puces pour des applications de type multimedia

Multiprocessor systems-on-chip (MPSoC) are defined as one of the main drivers of the industrial semiconductors revolution. MPSoCs are gaining popularity in the field of embedded systems. Pursuant to their great ability to parallelize at a very high integration level, they are good candidates for systems and applications such as multimedia. Memory is becoming a key player for significant improvements in these applications (i.e. power, performance and area). With the emergence of more embedded multimedia applications in the industry, this issue becomes increasingly vital. The large amount of data manipulated by these applications requires high-capacity calculation and memory. Lately, new programming models have been introduced. These programming models offer a higher programming level to answer the increasing needs of MPSoCs. This leads to the need of new optimization and mapping approaches suitable for embedded systems and their programming models. The overall objective of this research is to find solutions to the challenges of system level design of applications such as multimedia. This entails the development of new approaches and new optimization techniques. The specific objective of this research is to introduce the concept of memory optimization in the system level conception flow and study its impact on different programming models used for MPSoCs' design. In other words, it is the unification of the compilation and system level design domains. The contribution of this research is to propose new approaches for memory optimization techniques for MPSoCs' design in different programming models. This thesis relates to the integration of memory optimization to varying programming model types in the MPSoCs conception flow. Our research was done in collaboration with STMicroelectronics. This research targets two types of programming models: (1) Symmetrical Multi Processing (SMP) and (2) streaming.In an SMP environment, the approach for processor's design and application's memory optimizations can be combined for more efficient design of the systems. Thus, the memory optimization techniques improving overall performance (i.e. data locality, memory space, code size and processing time) can be adapted for symmetrical multi-processing, improving the overall processor efficiency. The combination of these techniques is mainly challenged by the adaptation of memory optimization techniques to the high parallelism offered by environments like the SMP architecture. These techniques may be adequate for mono-processor environments, but are not necessarily adapted for multiprocessor environments like SMP. The adaptation of memory optimization techniques has allowed us to optimize the size of the memory and the application code, and reduce the execution time. A study of the effect of a multiprocessor and multithreading environment on these techniques shows that the granularity of parallelism can greatly influence their implementation. A refinement of the granularity maximizes the parallelism of the application, but may make the execution of memory optimization techniques difficult and even impossible. Our proposed techniques improve the cache success rate by 20% and reduce the processing time by 50%. The applications Cavity Detection and Demosaicing were used for experiments purposes. In a streaming environment, the approach for application memory optimizations techniques is somehow similar to that of the mono-processor environment. However, the mapping phase in a multiprocessor design can affect the application of potential memory optimization to a great extent. Thus, approaches for combining memory optimization with mapping of data-driven applications can be used to maximize the possibility of memory optimization after the mapping process. The approaches presented in this thesis have improved the memory optimization, but have also improved the communication and processing time. For these experiments, we used randomly generated benchmarks and the Demosaicing application. Results depend greatly on the application used, but the experiments performed in our thesis work showed a decrease in memory size by 36% and a reduction in communication cost by 8%.