Distributed resonant clock grid synthesis (ROCKS)
DAC（2011）
摘要
Clock distribution networks can consume 35-70% of total chip power in high-performance designs. Resonant clocks can potentially reduce this power by recycling the energy using on-chip inductors. We propose the first automated Resonant clOCK Synthesis (ROCKS) algorithm. Experimental results show that with 10% inductor area, clock power can be reduced by 34%. With more inductor area, up to 90% power savings is shown feasible.
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关键词
distributed resonant clock grid synthesis,power saving,clock distribution network,resonant clock,total chip power,resonant,high-performance design,automated resonant clock synthesis,high-performance designs,clocks,clock grid,logic design,low power,clock power,clock distribution networks,rocks,resonant clock grid synthesis,inductor area,on-chip inductors,capacitance,system on a chip,resonant frequency,inductors,capacitors,benchmark testing,chip
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