Multilevel Radiation Protection of Partially Reconfigurable Field Programmable Gate Array Devices

Protection of on-board computing platforms from radiation effects is a complex problem. However, the cost of hardware failure in high-performance computers usually is very high, because it can result in billons of operations being lost within one second of system stall or even in mission failure. Traditional approaches based on redundant hardware and mechanical shielding can be very costly and still cannot guarantee full protection of high-performance computing platforms from radiation. Instead, we propose an approach based on run-time self-restoration of digital computing circuits allocated in partially reconfigurable field programmable gate array devices (FPGA). A novel approach is presented that allows sustaining the performance of the run-time reconfigurable stream processing system at its maximum level. This becomes possible by development of a multilevel self-restoration mechanism based on self-assembling/reassembling the virtual hardware components inside the FPGA in run time. This approach allows restoration from transient and permanent hardware faults without or with optimum performance degradation. However, at this stage of the project the fault detection aspect was not considered. All levels of the proposed mechanism were investigated and tested on the prototype reconfigurable computing platform. This platform was developed on a base of XILINX Virtex FPGA devices. Analysis of results shows that the developed mechanism of self-restoration allows very fast (run-time) restoration of functionality. On the other hand, it dramatically increases the lifetime of FPGA based space-borne computing platforms.