Efficient Implementation Of Trace-Back Unit In A Reconfigurable Viterbi Decoder Fabric
ISCAS (2)（2005）
摘要
This paper presents a reconfigurable viterbi fabric with efficient track-back unit in a system on chip device. The proposed reconfigurable fabric can support Viterbi implementations with constraint lengths ranging from 3 to 9, and code rates in the range 1/2-1/3. Our results illustrate that the proposed architecture has superior power consumption and throughput characteristics compared with a generic field programmable gate array (FPGA) and a digital signal processor (DSP), respectively.
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关键词
digital signal processing,viterbi algorithm,throughput,application specific integrated circuits,viterbi decoder,digital signal processor,system on a chip,convolutional codes,field programmable gate array,field programmable gate arrays,system on chip,viterbi decoding
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