A 500 MHz to 6 GHz frequency synthesizer architecture for cognitive radio applications.

This paper presents a frequency synthesizer architecture for cognitive radio applications designed to generate carrier frequencies spread into twelve bands distributed from 500 MHz to 6 GHz with a spacing of 500 MHz. At 4 GHz, the simulated phase noise is -110.8 dBc/Hz at a 1-MHz offset. The loop bandwidth of the PLL is of 575 kHz, and the switching time between bands is simulated to be of 5.75 ns.