A Current Ratio Model for Defect Diagnosis using Quiescent Signal Analysis

IDDQ test has been used extensively both as defect reliabil- ity screen and as a defect diagnostic technique. However, the increase in subthreshold leakage currents in deep sub-micron technologies has reduced the effectiveness of IDDQ in these applications. Quiescent Signal Analysis (QSA) is a novel diagnostic technique that uses IDDQ mea- surements made at multiple supply pads on the Chip-Under-Test as a means of locating shorting defects in the layout. The use of multiple supply pads reduces the adverse effects of leakage current by scaling the total leak- age current over multiple simultaneous measurements. In previous work, a resistance model for QSA was developed and demonstrated on a small circuit. In this paper, the weaknesses of the original QSA model are identified, in the context of a production power grid (PPG) and probe card model, and a new model is described. The new QSA algo- rithm predicts the position of the defect in the layout through the analysis of hyperbolic current ratio contours. SPICE simulation experiments are used to demonstrate the improved prediction accuracy of the new model on a por- tion of the PPG.